A new surface potential based poly-Si TFT model for circuit simulation was developed, accounting for the influence of both deep and tail states across the band gap. The model describes the drain current for all regions of operation using the unified equation. Calculations using the drain current model produce results that are in good agreement with the measured I-V characteristics of poly-Si TFTs.

A surface-potential-based compact model for polycrystalline silicon (poly-Si) thin-film transistors (TFTs) was developed, accounting for the effects of both deep and tail states across the band gap. The model describes the drain current in all regions of operation using the unified equation without the use of threshold voltage as an input parameter. Calculations using the drain current model produce results that are in good agreement with the measured current-voltage characteristics of poly-Si TFTs.