Highly Scaled Ruthenium Interconnects

Dutta, Shibesh; Kundu, Shreya; Gupta, Anshul; Jamieson, Geraldine; Granados, Juan Fernando Gomez; Bömmels, J.; Wilson, Christopher J.; Tőkei, Zsolt; Adelmann, Christoph

doi:10.1109/led.2017.2709248

Cited by 71 publications

(45 citation statements)

References 14 publications

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“…Moreover, the TCR method has led to electrical cross-sectional areas of Cu and Ru interconnect wires with cross-sectional areas down to < 100 nm 2 that are reasonably consistent with physical cross-sectional areas deduced from TEM [36,37]. However, the generalization of such results to any metallic interconnect system appears doubtful.…”

Section: The Tcr Methods In Metallic Nanowiresmentioning

confidence: 78%

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On the extraction of resistivity and area of nanoscale interconnect lines by temperature-dependent resistance measurements

Adelmann

2019

Solid-State Electronics

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Several issues concerning the applicability of the temperature coefficient of the resistivity (TCR) method to scaled interconnect lines are discussed. The central approximation of the TCR method, i.e. the substitution of the interconnect wire TCR by the bulk TCR becomes doubtful when the resistivity of the conductor metal is strongly increased by finite size effects. Semiclassical calculations for thin films show that the TCR deviates from bulk values when the surface roughness scattering contribution to the total resistivity becomes significant with respect to grain boundary scattering, an effect that might become even more important in nanowires due to their larger surface-to-volume ration. In addition, the TCR method is redeveloped to account for line width roughness. It is shown that for rough wires, the TCR method yields the harmonic average of the cross-sectional area as well as, to first order, the accurate value of the resistivity at the extracted area. Finally, the effect of a conductive barrier or liner layer on the TCR method is discussed. It is shown that the liner or barrier parallel conductance can only be neglected when it is lower than about 5 to 10% of the total conductance. It is furthermore shown that neglecting the liner/barrier parallel conductance leads mainly to an overestimation of the cross-sectional area of the center conductor whereas its resistivity is less affected.

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Section: The Tcr Methods In Metallic Nanowiresmentioning

confidence: 78%

“…However, in scaled interconnects, this assumption ceases to be obviously justified. This is even more the case for experimental patterning schemes [36,37]. In such cases, the 3σ LWR may not be negligible anymore with respect to the average line width w .…”

Section: A Model Derivation and Discussionmentioning

confidence: 98%

On the extraction of resistivity and area of nanoscale interconnect lines by temperature-dependent resistance measurements

Adelmann

2019

Solid-State Electronics

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“…This greatly increases the fitting uncertainty 43 because both surface and grain boundary scattering cause similar resistivity contributions such that the two effects typically cannot be uniquely separated, (ii) uncertainties in the wire cross-sectional area which fluctuates along the wire length and is typically determined by statistical micrograph analyses or the temperature coefficient of resistance (TCR) method. 44 This approach has been reported to lead to large uncertainties of up to 44% 45 due to uncertainty in the bulk temperature derivative of the resistivity and the potential breakdown of the TCR method due to increased electron-phonon coupling, 46 and (iii) resistivity contributions from surface roughness. The roughness is particularly large for the etched side-surfaces of wires and correctly accounting for its effect on resistivity scaling is challenging because it is not evident which of the multiple proposed models 12,14,[47][48][49][50][51][52] is most appropriate for a specific sample geometry.…”

Section: Introductionmentioning

confidence: 99%

Resistivity size effect in epitaxial Ru(0001) layers

Milosevic

Kerdsongpanya

Zangiabadi

et al. 2018

Journal of Applied Physics

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Epitaxial Ru(0001) layers are sputter deposited onto Al2O3(0001) substrates and their resistivity ρ measured both in situ and ex situ as a function of thickness d = 5-80 nm in order to quantify the resistivity scaling associated with electron-surface scattering. All layers have smooth surfaces with a root-mean-square roughness < 0.4 nm and exhibit an epitaxial relationship with the substrate: Ru[0001]║Al2O3[0001] and Ru[ 0 1 10 ]║Al2O3[ 0 2 11 ], suggesting negligible resistivity contributions from geometric surface roughness and grain boundary scattering. The room temperature ρ vs d data is well described by the semiclassical Fuchs and Sondheimer (FS) model, indicating a bulk electron mean free path λ = 6.7 ± 0.3 nm. Electron scattering at the Ru(0001) surface is distinctly different from the known Cu(001) surface: Its scattering specularity is unaffected by oxygen exposure but dependent on temperature and/or the environment, as indicated by a 43% decrease in the measured ρo×λ product with decreasing temperature from 295 to 77 K. Transport simulations employing the ruthenium electronic structure determined from firstprinciples and a constant relaxation time approximation indicate that the resistivity is strongly (by a factor of two) affected by both the transport direction and the terminating surfaces. This is quantified with a room temperature effective mean free path λ * which is relatively small for transport along the hexagonal axis independent of layer orientation (λ * = 4.3 nm) and for (0001) terminating surfaces independent of transport direction (λ * = 4.5 nm), but increases, for example, to λ * = 8.8 nm for (1120) surfaces and transport along [1100]. Direct experiment-simulation comparisons show a 12% and 49% higher λ from experiment at 77 and 295 K, respectively, indicating limitations of the semi-classical transport simulations despite the correct accounting of Fermi surface and Fermi velocity anisotropies. The overall results demonstrate a low resistivity scaling for Ru, suggesting that 10 nm half-pitch Ru interconnect lines are approximately 2 times more conductive than comparable Cu lines.

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“…At first, Cu resistivity is increased because of electron scattering at the sidewall and grain boundaries [140,141,142], which results in an exponential increase in resistivity and resistance. Secondly, there are limitations in scaling the diffusion barrier for the currently used Cu dual-damascene process, which increasingly reduces the Cu volume in interconnect lines [143,144]. Thirdly, barriers and liners do not scale well since strongly reduced thicknesses negatively affect the dielectric breakdown as well as the electromigration (EM) properties [144].…”

Section: Beol For Nano-scale Transistorsmentioning

confidence: 99%

Miniaturization of CMOS

Radamson

Zhang

et al. 2019

Micromachines

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When the international technology roadmap of semiconductors (ITRS) started almost five decades ago, the metal oxide effect transistor (MOSFET) as units in integrated circuits (IC) continuously miniaturized. The transistor structure has radically changed from its original planar 2D architecture to today’s 3D Fin field-effect transistors (FinFETs) along with new designs for gate and source/drain regions and applying strain engineering. This article presents how the MOSFET structure and process have been changed (or modified) to follow the More Moore strategy. A focus has been on methodologies, challenges, and difficulties when ITRS approaches the end. The discussions extend to new channel materials beyond the Moore era.

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Highly Scaled Ruthenium Interconnects

Cited by 71 publications

References 14 publications

On the extraction of resistivity and area of nanoscale interconnect lines by temperature-dependent resistance measurements

On the extraction of resistivity and area of nanoscale interconnect lines by temperature-dependent resistance measurements

Resistivity size effect in epitaxial Ru(0001) layers

Miniaturization of CMOS

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