Resistivity size effect in epitaxial Ru(0001) layers

Abstract

Epitaxial Ru(0001) layers are sputter deposited onto Al2O3(0001) substrates and their resistivity ρ measured both in situ and ex situ as a function of thickness d = 5-80 nm in order to quantify the resistivity scaling associated with electron-surface scattering. All layers have smooth surfaces with a root-mean-square roughness < 0.4 nm and exhibit an epitaxial relationship with the substrate: Ru[0001]║Al2O3[0001] and Ru[ 0 1 10 ]║Al2O3[ 0 2 11 ], suggesting negligible resistivity contributions from geometric surface roughness and grain boundary scattering. The room temperature ρ vs d data is well described by the semiclassical Fuchs and Sondheimer (FS) model, indicating a bulk electron mean free path λ = 6.7 ± 0.3 nm. Electron scattering at the Ru(0001) surface is distinctly different from the known Cu(001) surface: Its scattering specularity is unaffected by oxygen exposure but dependent on temperature and/or the environment, as indicated by a 43% decrease in the measured ρo×λ product with decreasing temperature from 295 to 77 K. Transport simulations employing the ruthenium electronic structure determined from firstprinciples and a constant relaxation time approximation indicate that the resistivity is strongly (by a factor of two) affected by both the transport direction and the terminating surfaces. This is quantified with a room temperature effective mean free path λ * which is relatively small for transport along the hexagonal axis independent of layer orientation (λ * = 4.3 nm) and for (0001) terminating surfaces independent of transport direction (λ * = 4.5 nm), but increases, for example, to λ * = 8.8 nm for (1120) surfaces and transport along [1100]. Direct experiment-simulation comparisons show a 12% and 49% higher λ from experiment at 77 and 295 K, respectively, indicating limitations of the semi-classical transport simulations despite the correct accounting of Fermi surface and Fermi velocity anisotropies. The overall results demonstrate a low resistivity scaling for Ru, suggesting that 10 nm half-pitch Ru interconnect lines are approximately 2 times more conductive than comparable Cu lines.

Resistivity scaling and electron surface scattering in epitaxial Co(0001) layers

“…These ξ values are 1-2 orders of magnitudes smaller than what would be expected, based on reported values of epitaxial layers with comparable thicknesses. 3,17 Thus, we conclude that the resistivity change upon air exposure cannot be primarily attributed to an increase in the Co surface roughness.…”

“…3 within the semiclassical framework by Fuchs and Sondheimer. 27,28 A well-known challenge 3,4,23 when applying this FS model to describe resistivity vs thickness data is that it does not allow for independent determination of the two parameters that quantify electron scattering, which are the surface scattering specularity p and the bulk mean free path λ. More specifically, for any arbitrary choice of p, a value for λ can be found such that the model predicts a ρ vs d curve that matches the measured data.…”

“…The pattern exhibits six peaks at ϕ = 30, 90, 150, 210, 270, and 330°, indicating a 6-fold rotational symmetry with a 60° spacing between each of the Co 10 ], in agreement with a previous report on the epitaxial growth of Co on c-plane sapphire, 60 and similar to the reported epitaxy of Ru on Al2O3(0001). 3,67,68 The average measured peak width in ϕ is 0.6°. This width is due to convoluted instrumental/geometric broadening (~0.3°) and in-plane and out-of-plane grain misalignment such that in-plane misalignment between the Co film and the substrate is <0.6°.…”

“…Consequently, Cu with a relatively large λ = 39 nm 30 yields less conductive lines than some competing metals, despite its smaller bulk resistivity, as has been shown with the resistivity cross-over between, for example, Ru and Cu for a 7.4-nm-wide square wire. 3 We note that these mean free path arguments have considerable merit and are a useful starting point to explore possible interconnect metal replacement options. However, they are based on semi-classical transport models which have been shown to diverge from both experiments and pure quantum mechanical treatments for narrow (< 10 nm) conductors.…”

“…The decreasing width of interconnect lines in integrated circuits below the electron mean free path leads to an increase in the resistivity [1][2][3] which is caused by electron scattering at surfaces [4][5][6][7][8] and grain boundaries, [9][10][11][12][13][14] and by an increasing effect from surface roughness. [15][16][17][18] This resistivity size effect represents a major challenge for the continued device downscaling and is most problematic for the smallest interconnect features closest to the logic devices, that is the middle of line (MOL) structures and the first levels of metallization for which the common metals of choice are W and Cu, respectively.…”