2021
DOI: 10.1109/led.2021.3097777
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High Speed and Large Memory Window Ferroelectric HfZrO₂ FinFET for High-Density Nonvolatile Memory

Abstract: We fabricated the HfZrO 2 (HZO) ferroelectric fin field-effect transistors (Fe-FinFET) with fin width of 60 nm and gate length of 100 nm for ferroelectric nonvolatile memory operations. The fabricated Fe-FinFET exhibited a large memory window (MW) of 1.5 V and high (100 ns) program/erase speeds at ±5 V. After 10 5 program/erase cycles, the MW was maintained at 1.09 V and the retention time was measured up to 10 4 s with no degradation. The fabricated HZO Fe-FinFET is compatible with the current FinFET process … Show more

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Cited by 32 publications
(11 citation statements)
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“…As depicted in the simulation results, the electric field in the gate insulator of the trench FinFET was much stronger than that in the conventional FinFET. This electric field enhancement occurs in the direction perpendicular to the gate electrode and gate insulator and induces fast dipole flipping [24]. This result is consistent with the low SS values of the trench Fe-FinFET due to the stronger NC effect.…”
Section: Resultssupporting
confidence: 83%
“…As depicted in the simulation results, the electric field in the gate insulator of the trench FinFET was much stronger than that in the conventional FinFET. This electric field enhancement occurs in the direction perpendicular to the gate electrode and gate insulator and induces fast dipole flipping [24]. This result is consistent with the low SS values of the trench Fe-FinFET due to the stronger NC effect.…”
Section: Resultssupporting
confidence: 83%
“…Therefore the dynamic reconfigurability of V TH , along with its intrinsic three-terminal structure, nonvolatility, superior write performance, excellent CMOS compatibility, and scalability 29 , 30 , shape FeFET a prime candidate for the non-volatile switch. Demonstrations of FeFET on advanced transistor technologies, such as the 22 nm fully-depleted silicon-on-insulator 31 , FinFET 32 and gate-all-around transistor 33 , 34 , have been reported, demonstrating the great promise of scaling for FeFET. The three terminal device structure makes the FeFET a very compact active interconnect.…”
Section: Introductionmentioning
confidence: 99%
“…[ 5 ] The scaling down of MOSFET has been challenging as the power management of IC strongly influences the production price and reliability. Currently, various breakthroughs have been suggested to resolve the limitation in scaling down conventional MOSFETs, such as increasing the data density in a unit area (such as multilevel logic, [ 6–11 ] memory computing, [ 12–15 ] and other area‐efficient method [ 16–18 ] ) and improving in device architecture (such as FinFET, [ 19–22 ] gate‐all‐around (GAA) FET, [ 22–28 ] tunneling field‐effect transistor (TFET) [ 22,29–31 ] ).…”
Section: Introductionmentioning
confidence: 99%