High Performance p-type SnO thin-film Transistor with SiO<sub>x</sub>Gate Insulator Deposited by Low-Temperature PECVD Method

Myeonghun, U; Han, Young Joon; Song, Sang-Hun; Cho, In-Tak; Lee, Jong-Ho; Kwon, Hyuck‐In

doi:10.5573/jsts.2014.14.5.666

Cited by 18 publications

(2 citation statements)

References 15 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…20) The previous finding is reproduced in Fig. 3(a) and, according to the analysis performed in the previous work, the evolution of the device's operation behavior can be divided into three stages: (i) Prior to the annealing, the channel film is a Sn-dominant metallic phase of the n-type with plenty of electrons (>10 22) They showed that, after annealing, the XRD spectrum of the film on thermal SiO 2 exhibited polycrystalline SnO peaks but none were seen for the film on PECVD-oxide. Owing to the low deposition temperature (150 °C), it was found that the PECVD-oxide was porous in structure and, accordingly, the morphology of the deposited oxide was very rough compared with that of the thermal oxide.…”

Section: Effects Of Gate Dielectrics On Crystallization Processmentioning

confidence: 57%

“…21) To date, there is only one paper reporting the effect of the underlying gate dielectric (SiO 2 ) deposited with various tools on the characteristics of SnO thin-film transistors (TFTs). 22) In this work, for the first time, we show that the gate dielectric materials may impact the transformation of the structure of the tin-oxide channel film during the oxygen annealing. Various annealing schemes were designed and conducted to gain insights into the evolution of film properties with thermal annealing and understand the consequences on device performance.…”

Section: Introductionmentioning

confidence: 75%

See 1 more Smart Citation

Impact of gate dielectrics and oxygen annealing on tin-oxide thin-film transistors

Zhong

Lin

Tsai

et al. 2016

Jpn. J. Appl. Phys.

View full text Add to dashboard Cite

In this work, we study the impact of gate dielectrics on the characteristics of bottom-gated tin-oxide thin-film transistors annealed in an oxygen ambience at 300 °C for various periods. SiO2, HfO2, and Al2O3 are employed as the gate dielectric in the test devices. The results show that the devices will start exhibiting p-type conduction behavior as the annealing reaches a specific time period which is closely related to the underlying gate dielectric, and the device characteristics can be improved as the annealing proceeds further. Nonetheless, a prolonged annealing may cause degradation of the devices. High hole mobility (3.33 cm2 V−1 s−1), low threshold voltage (1.95 V), and excellent I on/I off ratio (∼104) are achieved on SnO TFTs with a SiO2 gate dielectric after an annealing of 30 min.

show abstract

Section: Effects Of Gate Dielectrics On Crystallization Processmentioning

confidence: 57%

Section: Introductionmentioning

confidence: 75%

Impact of gate dielectrics and oxygen annealing on tin-oxide thin-film transistors

Zhong

Lin

Tsai

et al. 2016

Jpn. J. Appl. Phys.

View full text Add to dashboard Cite

show abstract

Copper (I) Selenocyanate (CuSeCN) as a Novel Hole‐Transport Layer for Transistors, Organic Solar Cells, and Light‐Emitting Diodes

Wijeyasinghe

Tsetseris

Regoutz

et al. 2018

Adv Funct Materials

View full text Add to dashboard Cite

The synthesis and characterization of copper (I) selenocyanate (CuSeCN) and its application as a solution-processable hole-transport layer (HTL) material in transistors, organic light-emitting diodes, and solar cells are reported. Density-functional theory calculations combined with X-ray photoelectron spectroscopy are used to elucidate the electronic band structure, density of states, and microstructure of CuSeCN. Solution-processed layers are found to be nanocrystalline and optically transparent (>94%), due to the large bandgap of ≥3.1 eV, with a valence band maximum located at −5.1 eV. Hole-transport analysis performed using field-effect measurements confirms the p-type character of CuSeCN yielding a hole mobility of 0.002 cm 2 V −1 s −1 . When CuSeCN is incorporated as the HTL material in organic light-emitting diodes and organic solar cells, the resulting devices exhibit comparable or improved performance to control devices based on commercially available poly(3,4-ethy lenedioxythiophene):polystyrene sulfonate as the HTL. This is the first report on the semiconducting character of CuSeCN and it highlights the tremendous potential for further developments in the area of metal pseudohalides.

show abstract

Recent Developments in p‐Type Oxide Semiconductor Materials and Devices

et al. 2016

View full text Add to dashboard Cite

The development of transparent p-type oxide semiconductors with good performance could be a true enabler for a variety of applications, where transparency, power efficiency and more circuit complexity are needed. Such applications include transparent electronics, displays, sensors, photovoltaics, memristors, and electrochromics. Hence, we review recent developments in materials and devices based on p-type oxide semiconductors, including ternary Cu-bearing oxides, binary copper oxides, tin monoxide, spinel oxides and nickel oxides. The crystal and electronic structures of these materials are reviewed, along with approaches to enhance valence band dispersion to reduce effective mass and increase mobility.Strategies to reduce the interfacial defects, off state current, and material instability are discussed. Furthermore, we show that promising progress has been made in the performance of various type of devices based on p-type oxides. For example, transparent oxide-based p-n junction diodes have experienced significantly improved performance, where rectification ratios >10 7 have been achieved. The performances of thin-film transistors and inverters have also been modestly improved. For example, thin-film transistors with field-effect mobilities exceeding 5 cm 2 V -1 s -1 have been reported. In addition, several innovative approaches were developed to fabricate transparent complementary metal oxide semiconductor (CMOS) 2 devices. These approaches include novel device fabrication schemes and utilization of surface chemistry effects, resulting in good inverter gains (as high as 120 has been demonstrated).Some progress has also been made in reducing the interfacial defects and off state currents using capping layers, high quality dielectrics and surface treatments. Resistive memory devices and hole transport layer in optoelectronic devices, mostly based on nickel oxide, have made decent progress. Transparent ferroelectric memory devices comprising p-type oxides have also been reported recently showing good hole mobilities (~3.3 cm 2 V -1 s -1 ) and good retention characteristics. This even includes multistate memory devices that show good stability. Nanoscale (e.g. nanowire) devices have now been reported using p-type oxides and do show performance improvements at scaled device geometry. New process developments have been reported, and some p-type oxides can now be deposited using atomic layer deposition and chemical routes, with promising performances. However, despite these recent developments, p-type oxides still lag in performance behind the n-type counterparts, which have entered volume production in the display market. The recent successes along with the hurdles that stand in the way of commercial success of p-type oxide semiconductors are presented in this review.

show abstract

High Performance p-type SnO thin-film Transistor with SiO_xGate Insulator Deposited by Low-Temperature PECVD Method

Cited by 18 publications

References 15 publications

Impact of gate dielectrics and oxygen annealing on tin-oxide thin-film transistors

Impact of gate dielectrics and oxygen annealing on tin-oxide thin-film transistors

Copper (I) Selenocyanate (CuSeCN) as a Novel Hole‐Transport Layer for Transistors, Organic Solar Cells, and Light‐Emitting Diodes

Recent Developments in p‐Type Oxide Semiconductor Materials and Devices

Contact Info

Product

Resources

About

High Performance p-type SnO thin-film Transistor with SiOxGate Insulator Deposited by Low-Temperature PECVD Method

Cited by 18 publications

References 15 publications

Impact of gate dielectrics and oxygen annealing on tin-oxide thin-film transistors

Impact of gate dielectrics and oxygen annealing on tin-oxide thin-film transistors

Copper (I) Selenocyanate (CuSeCN) as a Novel Hole‐Transport Layer for Transistors, Organic Solar Cells, and Light‐Emitting Diodes

Recent Developments in p‐Type Oxide Semiconductor Materials and Devices

Contact Info

Product

Resources

About

High Performance p-type SnO thin-film Transistor with SiO_xGate Insulator Deposited by Low-Temperature PECVD Method