Hf-based high-k dielectrics for p-Ge MOS gate stacks

Abstract

The physical and electrical properties of the gate stack high-k/Al 2 O 3 /GeO 2 /p-Ge were studied in detail, where the high-k is either HfO 2 or alloyed HfO 2 (HfZrO y , HfGdO x , or HfAlO x ). Electrical measurements combined with x-ray photoelectron spectroscopy chemical bonding analysis and band alignment determination were conducted in order to assess the suitability of hafnium-based high-k for this kind of gate stacks, with emphasis on low density of interface states and border traps. HfAlO x was found to be the most promising high-k from those studied. The authors have also found that the current-voltage trends for the various systems studied can be explained by the band alignment of the samples obtained by our x-ray photoelectron spectroscopy analysis. V

The ReaxFF reactive force-field: development, applications and future directions

“…This will enable future studies to assess ALD of Al 2 O 3 , as well as other feasible high-ĸ candidates and passivation strategies (such as hafnia, zirconia, tantalum, germanium oxynitride [96][97][98][99][100] and bi/tri-layer dielectrics [101][102][103][104] ) on pristine and oxidised Ge surfaces. As such, ReaxFF can be instrumental in identifying optimal processing conditions to form high quality high-ĸ dielectrics/non-Si semiconductor interfaces.…”

Effect of forming gas annealing on the degradation properties of Ge-based MOS stacks

“…Afterwards, the wafers were cleaned for 30 s in a diluted HF solution (2 wt.%) to remove most of the native oxide. After the HF dip, the Ge surface was reoxidized in a controlled manner to obtain a GeO 2 layer of ≈ 0.7 nm [28], [29]. Re-oxidation was done during the ALD of ≈ 2 nm Al 2 O 3 by means of the trimethylaluminum (TMA)/O 3 process.…”

“…Summarizing, multi-layered stacks under study are approximately 7 nm thick, with a Pt metal gate of 40 nm. Further details about the fabrication process can be found in our previous papers [28], [29], [32].…”

“…Nevertheless,HfO 2 was found to be unstable on GeO 2 [27]. On the other hand, Al 2 O 3 forms a very good interface with GeO 2 [28] but has a relatively low dielectric constant that hardly defines it as a high-k dielectric. A multilayer gate stack (highk/Al 2 O 3 /GeO 2 /Ge) is then usually propose in the literature, where the high-k is HfO 2 .…”

Modification of Early Effect for 28-nm nMOSFETs Deposited With HfZrO_{<italic>x</italic>} Dielectric After DPN Process Accompanying Nitrogen Concentrations

“…In the nanonode process, the high-k (HK) dielectric [2] has been formally integrated into the integrated-circuit (IC) manufacturing process instead of the conventional gate silicon oxide or oxynitride [3] before the 90-nm processes owing to the need of the increasing drive current to enhance the transistor switch speed. The useful HK dielectric materials recently contain hafnate or zirconate [4], [5]. The disadvantages of pure Hf-based or Zr-based dielectric demonstrated in the poly-or nanocrystallization in low-temperature annealing (∼600°C), oxygen vacancy [6]- [8] providing the oxide or charge traps increasing threshold voltage or the increase of gate leakage and reducing the k-value, and interface states increased because of the direct contact with channel surface deteriorating the drive current and device reliability [9], [10], and so forth.…”