Effect of forming gas annealing on the degradation properties of Ge-based MOS stacks

Aguirre, Fernando; Pazos, Sebastián; Palumbo, F.; Fadida, Sivan; Winter, R.; Eizenberg, M.

doi:10.1063/1.5018193

Cited by 4 publications

(3 citation statements)

References 48 publications

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“…Therefore, the amount of local defects in the LD plays a very important role defining its BD effect (as it happens in traditional 3D dielectrics like HfO 2 and SiO 2 ). Luckily, the amount of defects can be controlled by using different fabrication methods and postprocessing steps (annealing, plasma etching) stack …”

Section: Layered Dielectricsmentioning

confidence: 96%

A Review on Dielectric Breakdown in Thin Dielectrics: Silicon Dioxide, High‐k, and Layered Dielectrics

Palumbo

Wen

Lombardo

et al. 2019

Adv Funct Materials

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163

104

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Thin dielectric films are essential components of most micro-and nanoelectronic devices, and they have played a key role in the huge development that the semiconductor industry has experienced during the last 50 years. Guaranteeing the reliability of thin dielectric films has become more challenging, in light of strong demand from the market for improved performance in electronic devices. The degradation and breakdown of thin dielectrics under normal device operation has an enormous technological importance and thus it is widely investigated in traditional dielectrics (e.g., SiO 2 , HfO 2 , and Al 2 O 3 ), and it should be further investigated in novel dielectric materials that might be used in future devices (e.g., layered dielectrics). Understanding not only the physical phenomena behind dielectric breakdown but also its statistics is crucial to ensure the reliability of modern and future electronic devices, and it can also be cleverly used for other applications, such as the fabrication of new-concept resistive switching devices (e.g., nonvolatile memories and electronic synapses). Here, the fundamentals of the dielectric breakdown phenomenon in traditional and future thin dielectrics are revised. The physical phenomena that trigger the onset, structural damage, breakdown statistics, device reliability, technological implications, and perspectives are described.

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Section: Layered Dielectricsmentioning

confidence: 96%

A Review on Dielectric Breakdown in Thin Dielectrics: Silicon Dioxide, High‐k, and Layered Dielectrics

Palumbo

Wen

Lombardo

et al. 2019

Adv Funct Materials

Self Cite

163

104

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show abstract

“…This partial elimination of the interface traps after PMA has been observed in several studies of p-type Ge MOS capacitors, indicating a universal origin of this effect. 12,15,16,31,32 In the following, we summarize the results of the electrical characterization and their interrelation with the corresponding structural main findings.…”

Section: Electrical Characterization: Experimental Results and Discus...mentioning

confidence: 97%

Post-metallization annealing and photolithography effects in p-type Ge/Al₂O₃/Al MOS structures

Ioannou‐Sougleridis¹,

Alafakis²,

Pécz³

et al. 2022

ECS J. Solid State Sci. Technol.

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In this work, the combined effect of negative tone photolithography and post-metallization annealing (PMA) on the electrical behavior of Al/Al2O3/p-Ge MOS structures are investigated. During photoresist development, the exposed upper part of the Al2O3 film weakens due to the reaction with the developer. Subsequent processes of Al deposition and PMA at 350°C result in alumina thickness reduction. The gate electrode formation seems to involve at least three processes: a) germanium substrate out-diffusion and accumulation at the top of the alumina layer that takes place during the alumina deposition, b) alumina destabilization, and c) germanium diffusion into the deposited Al metal and Al diffusion into the alumina. The overall effect is the reduction of the alumina thickness due to its partial consumption. It is shown that the germanium diffusion depends on the annealing duration, and not on the annealing ambient (inert or forming gas). Although PMA passivates interface traps near the valence band edge, the insulating properties of the stacks are degraded. This degradation appears as a low-level ac loss, attributed to a hopping current that flows through the Al2O3 layer. The results are discussed and compared to recently reported on Pt/Al2O3/p-Ge structures formed and treated under the same conditions.

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“…This outcome is in line with other works. 17,18 In an effort to examine the influence of the metal gate electrode to the passivation of interface defects in forming gas ambient PMA, we had repeated the experiment on similar MOS structures with Pt gate electrodes. The use of Pt electrode adds interest since it is well known that Pt acts catalytically and dissociates molecular hydrogen to atomic one.…”

mentioning

confidence: 99%

Degradation of Pt-Al₂O₃-Ge Metal Oxide Semiconductor Structures due to Pt-Al₂O₃ Induced Reactions

Ioannou‐Sougleridis

Alafakis

Vouroutzis

et al. 2020

ECS J. Solid State Sci. Technol.

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In this work, Pt-alumina-Ge metal oxide semiconductor structures are investigated. An important finding is that the Pt metal layer reacts with the underlying aluminum of the atomic layer deposited amorphous alumina, forming a crystalline Al-Pt alloy between the Pt and the remaining alumina layer. This effect is attributed to the alumina surface destabilization due to the short exposure to photolithography developer. Subsequent annealing at 350 °C in inert gas ambient does not impose significant changes to the stack, while forming gas annealing at the same temperature seems to further promote the Pt-Al reaction. One of the consequences of the Al-Pt alloy formation is the reduction of the alumina layer thickness. In turn, the insulating properties of the Pt-Al 2 O 3 -Ge MOS stacks are degraded, manifested by enhanced density of interface traps near the valence band edge and by the observation of dc conduction mechanism in conductance characteristics, observable at low temperatures. The level of this degradation depends on the extent of the Pt-Al reaction, which is enhanced by the hydrogen annealing, yielding structures characterized by high leakage currents. These findings may add additional knowledge to the understanding of the Ge-based MOS metallization processes, as well as to the subsequent post-metallization annealing recipes.

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Effect of forming gas annealing on the degradation properties of Ge-based MOS stacks

Cited by 4 publications

References 48 publications

A Review on Dielectric Breakdown in Thin Dielectrics: Silicon Dioxide, High‐k, and Layered Dielectrics

A Review on Dielectric Breakdown in Thin Dielectrics: Silicon Dioxide, High‐k, and Layered Dielectrics

Post-metallization annealing and photolithography effects in p-type Ge/Al₂O₃/Al MOS structures

Degradation of Pt-Al₂O₃-Ge Metal Oxide Semiconductor Structures due to Pt-Al₂O₃ Induced Reactions

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Effect of forming gas annealing on the degradation properties of Ge-based MOS stacks

Cited by 4 publications

References 48 publications

A Review on Dielectric Breakdown in Thin Dielectrics: Silicon Dioxide, High‐k, and Layered Dielectrics

A Review on Dielectric Breakdown in Thin Dielectrics: Silicon Dioxide, High‐k, and Layered Dielectrics

Post-metallization annealing and photolithography effects in p-type Ge/Al2O3/Al MOS structures

Degradation of Pt-Al2O3-Ge Metal Oxide Semiconductor Structures due to Pt-Al2O3 Induced Reactions

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Product

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Post-metallization annealing and photolithography effects in p-type Ge/Al₂O₃/Al MOS structures

Degradation of Pt-Al₂O₃-Ge Metal Oxide Semiconductor Structures due to Pt-Al₂O₃ Induced Reactions