Gate prespacers for high density DRAMs

Divakaruni, R.; Weybright, M.; Li, Y.; Gruening, U.; Mandelman, J.; Gambino, Jeff; Alsmeier, J.; Bronner, G.

doi:10.1109/vtsa.1999.786048

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Gate prespacers for high density DRAMs

Cited by 3 publications

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Influence of Hydrogen Incorporation on the Reliability of Gate Oxide Formed by Using Low-Temperature Plasma Selective Oxidation Applicable to Sub-50-nm W-Polymetal Gate Devices

Influence of Hydrogen Incorporation on the Reliability of Gate Oxide Formed by Using Low-Temperature Plasma Selective Oxidation Applicable to Sub-50-nm W-Polymetal Gate Devices

A highly manufacturable 110 nm DRAM technology with 8F/sup 2/ vertical transistor cell for 1Gb and beyond

Highly Reliable and Scalable Tungsten Polymetal Gate Process for Memory Devices Using Low-Temperature Plasma Selective Gate Reoxidation

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