Fundamentals of electron beam testing of integrated circuits

Menzel, Eberhard; Kubalek, E.

doi:10.1002/sca.4950050301

Cited by 153 publications

(32 citation statements)

References 50 publications

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“…Due to the slow response of the secondary electron detector, voltage contrast requires sampling techniques to achieve time resolutions better than 50 ns [5]. The particular sampling scheme used in voltage contrast is electron beam stroboscopy [9].…”

Section: Techniquementioning

confidence: 99%

Fault Contrast: A New Voltage Contrast VLSI Diagnosis Technique

Stivers

Ferguson

1986

24th International Reliability Physics Symposium

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sorted out and discarded, the better.Fault contrast is a differential analog technique that yields high-quality voltage contrast images of integrated circuit (IC) pass vs. fail operation.Fault contrast is applicable where the IC failure mode is sensitive to an external parameter, e.g. clock frequency or supply voltage. Fault contrast requires only simple and inexpensive analog signal processing. We demonstrate fault contrast with an analysis of an Intel 80286 microprocessor failure. Introducti onA major class of IC failures are those in which the IC can be made to pass or fail by varying an external parameter, e.g. clock frequency or supply voltage. These failure modes reflect design and process marginalities that must be characterized to optimize IC performance and yield. This paper describes a combination of voltage contrast measurement and special IC test procedures that quickly finds the the origin of failures of this class. This technique, fault contrast, yields images in which failing nodes stand out against all others. Fault contrast is a purely analog technique requiring only a minor modification to a conventional stroboscopic voltage contrast scanning electron microscope (SEM).The fault contrast signal is a measure of voltage differences between sequential program executions while the IC is caused to alternately pass and fail by the variation of an external parameter. This parameter can be supply voltage, clock frequency, input voltage level, programming voltage, illumination, etc. The only limitation on the parameter is that it must be alterable with every execution of the diagnostic program.Fault contrast is therefore applicable to an extensive class of vol tage contrast applications. Fault contrast yields the results of digital frame subtraction, however, fault contrast requires only simple analog signal processing and simple logic to implement. In addition, fault contrast is immune to many artifacts that tend to complicate techniques based on digital frame subtraction.Fault contrast is a variation of voltage contrast, an electron beam probing technique that can probe internal nodes of an IC without contact, destruction, or capacitive loading. Several groups have developed and reported on voltage contrast technology [ 1 2, 3, 4, 5, 6, 7, 8, 9]. The power of voltage contrast lies in its ability to access most nodes of an IC by merely deflecting an electron beam to those nodes. SEMs can image the voltages on an IC by rastering the electron beam over a field on the IC. The imaging mode is so easy to use that large amounts of voltage data of nodes in the neighborhood of the failing nodes are usually acquired during a typical voltage contrast analysis. The acquisition of these extraneous data does have practical consequences. These extraneous data must be subsequently sorted out to reveal the failure. This can take more time than the data acquisition itself. Furthermore, the data acquisition speed itself is limited by the electron beam current, which can average as low as 1 pa in the low-duty-cycle strobos...

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Section: Techniquementioning

confidence: 99%

Fault Contrast: A New Voltage Contrast VLSI Diagnosis Technique

Stivers

Ferguson

1986

24th International Reliability Physics Symposium

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“…Quantitative voltage measurements are possible only if the secondary electron emission remains the same for different measuring points on the IC surface. Factors which alter secondary electron emission and thereby degrade the voltage resolution include topography, differences in material and their surface condition (12). If a secondary electron analyzing scheme is added and the detrimental effects mentioned above can be minimized, the voltage resolution can be improved to resolve voltage differences on the order of 1 millivolt.…”

Section: 66mentioning

confidence: 98%

Scanning Electron Microscopic Techniques for Characterization of Semiconductor Materials

Young

Kalin

1986

ACS Symposium Series

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The Scanning Electron Microscope (SEM), a powerful and versatile analytical tool, has proven to be indispensable for characterizing semiconductor devices and materials. This paper focuses attention on the working principle of the SEM and the signals available for analysis. Techniques for applying these signals for characterization of semiconductor devices and materials are grouped into three categories: imaging, x-ray microanalysis, and electrical. Imaging techniques vary from standard quality control inspection to in-depth cross-sectional analysis which is required for technlogy development. The advantages of having energy dispersive (EDS) and wavelength dispersive (WDS) x-ray spectrometers for x-ray microanalysis are also discussed. Voltage contrast and Electron Beam Induced Current (EBIC), two electrical techniques usually used for circuit analysis, have been proven useful for semiconductor materials characterization. The SEM has been integrated into semiconductor technology development and will continue to evolve to meet the challenges of Very Large Scale Integration (VLSI) processing.The scanning electron microscope (SEM) is the most versatile analytical instrument available for the characterization of semiconductor devices and materials. M In no field of physical sciences has the SEM been more productive than in the semiconductor industry; without the SEM the industry would not be nearly as advanced as it is -conversely, without the enormous economic impetus of the semiconductor industry, the sophisticated advancements in SEM instrumentation would not have come as quickly or in great a profusion as they have" (1). As very large scale integration (VLSI) technologies approach near-micron geometries, the importance of the SEM is becoming even greater as the usefulness of the optical microscope diminishes. The spatial resolution of the modern SEM (typically 40 A) approaches the resolving power of a transmission electron microscope (TEM), yet is without the difficult and time-consuming sample preparation required for TEM analysis. The typical magnification range of 10

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“…The high density of transistors, together with dense back-end-of-line structures, prevents the applicability of conventional testing techniques to modern ICs. Mechanical microprobes and e-beam (Electron Beam Testing [4]) hardly find the failing device in sub-micron technologies if the fault is hidden behind many interconnection layers. In fact, mechanical probes and electron beams access the IC only from the front-side of the chip (see FIGURE 1), thus limiting the test to only the top metal layers.…”

Section: Introduction: Optical Testing and Hot-carrier Photoemissionmentioning

confidence: 99%

Hot-Carrier Photoemission in Scaled CMOS Technologies: A Challenge for Emission Based Testing and Diagnostics

Tosi

Stellari

Pigozzi

et al. 2006

2006 IEEE International Reliability Physics Symposium Proceedings

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Optical testing of advanced CMOS circuits successfully exploits the near-infrared photon emission by hot-carriers in transistor channels (see EMMI [1] and PICA [2][3] techniques). However, due to the continuous scaling of features size and supply voltage, spontaneous emission is becoming fainter and optical circuit diagnostics becomes more challenging.Here we present the experimental characterization of hot-carrier luminescence emitted by transistors in four CMOS technologies from two different manufacturers. Aim of the research is to gain a better perspective on emission trends and dependences on technological parameters. In particular, we identify luminescence changes due to Short-Channel Effects (SCE) and we ascertain that, for each technology node, there are two operating regions, for short-and long-channels. We highlight the emission reduction of p-FETs compared to n-FETs, due to a "red-shift" (lower energy) of the hotcarrier distribution. Eventually, we give perspectives about emission trends in actual and future technology nodes, showing that luminescence dramatically decreases with voltage, but it recovers strength when moving from older to more advanced technology generations. Such results extend the applicability of optical testing techniques, based on present single-photon detectors, to future lowvoltage chips. [

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Fundamentals of electron beam testing of integrated circuits

Cited by 153 publications

References 50 publications

Fault Contrast: A New Voltage Contrast VLSI Diagnosis Technique

Fault Contrast: A New Voltage Contrast VLSI Diagnosis Technique

Scanning Electron Microscopic Techniques for Characterization of Semiconductor Materials

Hot-Carrier Photoemission in Scaled CMOS Technologies: A Challenge for Emission Based Testing and Diagnostics

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