Fault Contrast: A New Voltage Contrast VLSI Diagnosis Technique

Abstract

sorted out and discarded, the better.Fault contrast is a differential analog technique that yields high-quality voltage contrast images of integrated circuit (IC) pass vs. fail operation.Fault contrast is applicable where the IC failure mode is sensitive to an external parameter, e.g. clock frequency or supply voltage. Fault contrast requires only simple and inexpensive analog signal processing. We demonstrate fault contrast with an analysis of an Intel 80286 microprocessor failure. Introducti onA major class of IC failures are those in which the IC can be made to pass or fail by varying an external parameter, e.g. clock frequency or supply voltage. These failure modes reflect design and process marginalities that must be characterized to optimize IC performance and yield. This paper describes a combination of voltage contrast measurement and special IC test procedures that quickly finds the the origin of failures of this class. This technique, fault contrast, yields images in which failing nodes stand out against all others. Fault contrast is a purely analog technique requiring only a minor modification to a conventional stroboscopic voltage contrast scanning electron microscope (SEM).The fault contrast signal is a measure of voltage differences between sequential program executions while the IC is caused to alternately pass and fail by the variation of an external parameter. This parameter can be supply voltage, clock frequency, input voltage level, programming voltage, illumination, etc. The only limitation on the parameter is that it must be alterable with every execution of the diagnostic program.Fault contrast is therefore applicable to an extensive class of vol tage contrast applications. Fault contrast yields the results of digital frame subtraction, however, fault contrast requires only simple analog signal processing and simple logic to implement. In addition, fault contrast is immune to many artifacts that tend to complicate techniques based on digital frame subtraction.Fault contrast is a variation of voltage contrast, an electron beam probing technique that can probe internal nodes of an IC without contact, destruction, or capacitive loading. Several groups have developed and reported on voltage contrast technology [ 1 2, 3, 4, 5, 6, 7, 8, 9]. The power of voltage contrast lies in its ability to access most nodes of an IC by merely deflecting an electron beam to those nodes. SEMs can image the voltages on an IC by rastering the electron beam over a field on the IC. The imaging mode is so easy to use that large amounts of voltage data of nodes in the neighborhood of the failing nodes are usually acquired during a typical voltage contrast analysis. The acquisition of these extraneous data does have practical consequences. These extraneous data must be subsequently sorted out to reveal the failure. This can take more time than the data acquisition itself. Furthermore, the data acquisition speed itself is limited by the electron beam current, which can average as low as 1 pa in the low-duty-cycle strobos...

Gated-Pulse Stroboscopy for Passivated Device Imaging

“…These may be independently controlled for sampling time, permitting "real time image subtraction" to be performed. Results in this mode are similar to those of the "Phase Dependant Voltage Contrast" [11] and "Fault Contrast" imaging techniques [12].…”

Marginal fault diagnosis based on e-beam static fault imaging with CAD interface

“…Since many intemal nets in the DUT can be observed at a glance with this technique, a faulty area can be quickly localized with very little diagnostic effort [4]. So far, however, no practical implementation of the image-based method has been realized, because (a) there has been no established guideline for the image-based fault tracing, and (b) it takes considerable time to acquire dynamic fault images by a stroboscopic technique.…”

“…An image-based method called dynamic fault imaging [3] [4] has been proposed as a substitute for the waveform-based method. Since many intemal nets in the DUT can be observed at a glance with this technique, a faulty area can be quickly localized with very little diagnostic effort [4].…”