2018
DOI: 10.1109/tcsii.2017.2764096
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Feedforward Phase Noise Cancellation Exploiting a Sub-Sampling Phase Detector

Abstract: This paper presents a feedforward phase noise cancellation technique to reduce phase noise of the output clock signal of a phase-locked loop (PLL). It uses a sub-sampling phase detector to measure the phase noise and a variable time delay for cancellation. Both phase noise and spurs are reduced. Analytical expressions have been derived that characterize the performance of this technique and show its fundamental limitations. A subsampling phase-locked loop with the cancellation technique as a built-in feature i… Show more

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Cited by 9 publications
(3 citation statements)
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References 18 publications
(47 reference statements)
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“…where T F is a fixed delay between the input and output of the VCDL. The [7]. The high-pass filtered RVCO 1 Since a high frequency RVCO output has a very high slew rate (SR SSP D ), a high phase error detection gain is expected.…”
Section: Fractional-n Sspll With Fpncmentioning
confidence: 99%
See 2 more Smart Citations
“…where T F is a fixed delay between the input and output of the VCDL. The [7]. The high-pass filtered RVCO 1 Since a high frequency RVCO output has a very high slew rate (SR SSP D ), a high phase error detection gain is expected.…”
Section: Fractional-n Sspll With Fpncmentioning
confidence: 99%
“…The high-pass filtered RVCO 1 Since a high frequency RVCO output has a very high slew rate (SR SSP D ), a high phase error detection gain is expected. phase noise at the SSPLL output Out RV CO undergoes further FPNC-based noise filtering (theoretical filtering upto f ref /2 cannot be reached due to the aliasing from sampling operation and filtering of the hold function in the SSPD [7]). Drawback of the FPNC is that, the reference and DTC noise directly impact the Out V CDL through the feedforward path with minimal filtering (due to sample and hold filtering of the SSPD).…”
Section: Fractional-n Sspll With Fpncmentioning
confidence: 99%
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