Fault modeling and testing of 1T1R memristor memories

Abstract

Memristor memory has attracted more attentions to act as one of future non-volatile memories. One access transistor and one memristor (1T1R) cell structure can be used to eliminate the issue of sneak path current of memristor memories with crossbar structure. In this paper, we propose several fault models for 1T1R memristor memories based on electrical defects, such as resistive bridge between two nodes, transistor stuck-on and stuckopen faults. In comparison with existing faults, two new faults, write disturbance fault (W DF ) and dynamic write disturbance fault (dW DF ), are found. In addition, a March test is proposed to cover the defined faults. The March test requires (1+2a+2b)N write operations and 5N read operations for an N -bit memristor memory, where a and b are the number of consecutive Write-1 and Write-0 operations for activating a dW DF .Index Terms-Non-volatile memory, memristor, resistive memory, test.

State of the art and challenges for test and reliability of emerging nonvolatile resistive memories

“…Testing RRAMs for their potential faults can be divided to 2 main categories: (1) March‐based tests and (2) non‐March–based tests . The existing March‐based test aims at detecting the traditional memory‐related faults and new type of RRAM‐related faults by extending or modifying conventional approaches .…”

“…Testing RRAMs for their potential faults can be divided to 2 main categories: (1) March‐based tests and (2) non‐March–based tests . The existing March‐based test aims at detecting the traditional memory‐related faults and new type of RRAM‐related faults by extending or modifying conventional approaches . On the other hand, some new RRAM‐related faults, such as the undefined state fault, cannot be covered by the March test only, and therefore, new DfT techniques are needed .…”

“…Three types of RRAM permanent faults have been reported in literature . They are (1) stuck at “0” (SA0), (2) Stuck at “1” (SA1), and (3) transition fault (Tr).…”

“…These faults can be caused by defects occurring during the resistive stack formation such as improper deposition of the bottom or top electrode, dishing, and/or voids occurring during the electrode polishing. Three types of RRAM permanent faults have been reported in literature [45][46][47]. They are (1) stuck at "0" (SA0), (2) Stuck at "1" (SA1), and (3) transition fault (Tr).…”

Logic operation-based DFT method and 1R memristive crossbar March-like test algorithm

“…However, due to its immature manufacture process, memristive crossbar is prone to defects and requires efficient test methods for precise fault models with short test time. A number of test methods and fault models are proposed to test memristive crossbar [2,3,4,5] till now. The modeled faults can be classified as single-cell faults and coupling faults [2].…”