Fast evaluation of symmetric-feasible sequence-pairs for analog topological placement

Improved method of cell placement with symmetry constraints for analog IC layout design

“…They presented necessary and sufficient conditions for the existence of the cell placement which satisfies both the given symmetry constraints and the topology constraints imposed by a sequence-pair [2,3]. They defined a sequence-pair satisfying the above conditions as "symmetric-feasible sequence-pair," and proposed a method of obtaining nearly optimum solutions by only searching a symmetric-feasible sequence-pair using Simulated Annealing.…”

“…Balasa et al proposed a symmetric placement method [2,3] using a sequence-pair which is a topological representation of rectangular block placement [4]. They presented necessary and sufficient conditions for the existence of the cell placement which satisfies both the given symmetry constraints and the topology constraints imposed by a sequence-pair [2,3].…”

“…Therefore, such a sequence-pair is not symmetric-feasible. In addition, when a symmetric-feasible sequence-pair is decoded to a placement by Balasa's method [2,3], there are some cases where cells overlap each other or the closest packing satisfying the symmetry and the topology constraints cannot be obtained. This induces enlargement of die size and increase of wire length, both of which are undesirable in the layout design.…”

Beyond GORDIAN and Kraftwerk

“…While previous approaches to physical design of analog circuits [48,50,[53][54][55][56][57][58][59] were based on stochastic approaches (primarily Simulated Annealing), Plantage took a deterministic approach -in line with the strong conviction of Kurt Antreich that while deterministic approaches are more difficult to implement as they require a significantly deeper understanding of the problem to be solved, they will reward the researcher with superior results and computational efficiency. Plantage could also consider more different types of constraints than any previous approach.…”

Deterministic analog circuit placement using hierarchically bounded enumeration and enhanced shape functions

“…The authors of these papers propose Simulated Annealing algorithms that consider symmetry constraints with a restricted solution space using O-trees [11], B*-trees [16], Sequence Pairs [18] [19], and Sequence Pairs with Johnson's Priority Queue [20]. In [21], a different approach is presented, based on two modifications of the B*-tree: the first is to handle symmetry constraints with so-called Symmetry Islands and the second to combine these Symmetry Islands with the rest of the modules.…”