Deterministic analog circuit placement using hierarchically bounded enumeration and enhanced shape functions

Abstract

Abstract-The analog placement algorithm Plantage, presented in this paper, generates placements for analog circuits with comprehensive placement constraints. Plantage is based on a hierarchically bounded enumeration of basic building blocks, using B*-trees. The practically relevant solution space is thereby enumerated quasi-complete. The sets of possible placements of the basic building blocks are represented and combined in a new efficient way, using enhanced shape functions. The result of Plantage is the Pareto front of placements with respect to different aspect ratios. The whole approach is deterministic, in contrast to existing analog placement algorithms.

Thermal-Driven Analog Placement Considering Device Matching

“…We performed two sets of experiments: (1) one is based on the analog placement benchmarks in [2,8,17] consisting of analog designs, biasynth_2p4g and lnamixbias_2p4g, with different numbers of symmetry groups, and (2) the other is based on the real analog circuit, the binary weighted current network shown in Figure 8(a), containing a large common-centroid device group in which each device has different numbers of subdevices of uniform sizes.…”

“…Analog placement considering device matching constraints has been extensively studied based on various floorplan representations, such as the absolute floorplan representation [4,7], B*-tree [2,17], hierarchical B*-tree (HB*-tree) [8], sequence pair (SP) [1,18], transitive closure graphs (TCG) [10,22], and corner block list (CBL) [11] for symmetry constraints, and CBL and grid-based approaches [14] for common-centroid constraints. Among these works, only [4,7,11] addressed thermally constrained symmetric placement.…”

“…Since the vertical movement of the power devices does not affect the shape of the isothermal contour very much, we simply evenly distribute the power devices vertically by traversing the vertical constraint graph (VCG) representing the vertical relationship among the power devices, which can be converted from a B*-tree as described in [17].…”

SWARM: A Self-Organization Approach for Layout Automation in Analog IC Design

“…Evolutionary approaches such as genetic algorithms have as well been applied to analog placement [12], and furthermore, [13] also investigates the use of neural networks. Some works, that disapprove the stochastic behavior found in most placement algorithms, decidedly pursue deterministic solutions [8] and [14].…”

“…Particular research effort is spent on the formal, explicit consideration of constraints. E.g., for placement many algorithms take device symmetry [5] and [11] and device proximity [10] and [14] into account. For routing, the constraints of interest include net shielding [6] and wiring symmetry [8].…”