Expression of Concern: Simulation and modeling of the effect of substrate conductivity on coupling inductance and circuit crosstalk

Massoud, Yehia; White, Jacob K.

doi:10.1109/tvlsi.2002.1043331

Cited by 81 publications

(49 citation statements)

References 7 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Until recently, most extraction and delay analysis tools have been limited to RC networks leaving an inherent unpredictability in the design process where inductive effects are suspected [6]- [9]. But, with the recognized significance of including inductive effects and their impact on performance and signal integrity, several techniques have been proposed to deal with these effects.…”

mentioning

confidence: 99%

Expression of Concern: Managing on-chip inductive effects

Massoud

Majors²,

Kawa

et al. 2002

IEEE Trans. VLSI Syst.

Self Cite

View full text Add to dashboard Cite

Abstract-With process technology and functional integration advancing steadily, chips are continuing to grow in area while critical dimensions are shrinking. This has led to the emergence of on-chip inductance to be a factor whose effect on performance and on signal integrity has to be managed by chip designers and has to be sometimes traded off against other performance parameters. In this paper, we cover several techniques to reduce on-chip inductance which in turn improve timing predictability and reduce signal delay and crosstalk noise. We present experimental results obtained from simulations of a typical high performance bus structure and a clock tree structure to examine the effectiveness of some of the different inductance reduction techniques.

show abstract

mentioning

confidence: 99%

Expression of Concern: Managing on-chip inductive effects

Massoud

Majors²,

Kawa

et al. 2002

IEEE Trans. VLSI Syst.

Self Cite

View full text Add to dashboard Cite

show abstract

“…The imaginary part of the current gives the inductance of the spiral, L ind and the ratio of imaginary and real part yields quality factor Q as in equations (9) - (11).…”

Section: Modeling Rf Inductorsmentioning

confidence: 99%

“…While it accounts for distributed capacitance, skin depth, and inductive cross-coupling, this method intentionally 1 ignores substrate-induced parasitic effects, such as capacitive coupled noise, Eddy currents, etc. Other researchers have addressed these issues [9], [11].…”

Section: Introductionmentioning

confidence: 99%

Reduced order models of integrated rf spiral inductors with geometrical and technological automatic parameterization

Garg

Gharpurey

Charbon

BMAS 2005. Proceedings of the 2005 IEEE International Behavioral Modeling and Simulation Workshop, 2005.

View full text Add to dashboard Cite

show abstract

“…Shielding lines are used to reduce the coupling inductance effect of a transmission line [7] [14]. Shielding lines are grounded to the substrate, and placed between signal lines in order to reduce mutual inductance between signal lines.…”

Section: Shielding Practicementioning

confidence: 99%

“…Shielding techniques have been developed to reduce the mutual inductance of signal lines. This allows induced noise to be decreased [14]. The connections of shielding lines to ground could present resistive open defects [13].…”

Section: Introductionmentioning

confidence: 99%

Signal integrity loss in bus lines due to open shielding defects

Avendano

Champac

Figueras

The Eighth IEEE European Test Workshop, 2003. Proceedings.

View full text Add to dashboard Cite

Interconnect structures in high speed circuits play an important role in present CMOS technologies. Inductance and capacitance coupling effects (crosstalk) may cause a significant loss in signal integrity in high performance systems. One way to reduce these effects is to place a signal line between two grounded lines (shield). In this paper we study the influence of defective grounding of shielding lines. We focus on resistive open defects due to manufacturing problems or broken vias. Faulty shields may cause undershoots or ringings in signal traveling in long interconnect lines. Simple expressions for undershoots and overshoots have been derived using dominant poles and employed to determine the zones of signal integrity violation for different lengths of interconnect lines.The results show the impact of defective grounded shields.

show abstract

Expression of Concern: Simulation and modeling of the effect of substrate conductivity on coupling inductance and circuit crosstalk

Cited by 81 publications

References 7 publications

Expression of Concern: Managing on-chip inductive effects

Expression of Concern: Managing on-chip inductive effects

Reduced order models of integrated rf spiral inductors with geometrical and technological automatic parameterization

Signal integrity loss in bus lines due to open shielding defects

Contact Info

Product

Resources

About