Exploiting error control approaches for Hardware Trojans on Network-on-Chip links

Yu, Qiaoyan; Frey, Jonathan

doi:10.1109/dft.2013.6653617

Cited by 31 publications

(10 citation statements)

References 27 publications

(25 reference statements)

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“…Run-time hardware Trojan detection approaches can modify the target structure they aim to protect [ 22 ]. Similarly, they can employ multiple modular redundancies at the software level to perform a task even with malicious hardware [ 23 ]. Test-time approaches employ functional verification [ 22 ] and side channel measurements [ 24 , 25 ].…”

Section: Related Workmentioning

confidence: 99%

Malicious Activity Detection in Lightweight Wearable and IoT Devices Using Signal Stitching

Karabacak

Ogras

Ozev

2021

Sensors

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The integrated circuit (IC) manufacturing process involves many players, from chip/board design and fabrication to firmware design and installation. In today’s global supply chain, any of these steps are prone to interference from rogue players, creating a security risk. Therefore, manufactured devices need to be verified to perform only their intended operations since it is not economically feasible to control the supply chain and use only trusted facilities. This paper presents a detection technique for malicious activity that can stem from hardware or firmware Trojans. The proposed technique relies on (i) repetitious side-channel sample collection of the active device, (ii) time-domain stitching, and (iii) frequency domain analysis. Since finding a trusted sample is generally impractical, the proposed technique is based on self-referencing to remove the effects of environmental or device-to-device variation in the frequency domain. We first observe that the power spectrum of the Trojan activity is confined to a low-frequency band. Then, we exploit this fact to achieve self-referencing using signal detection theory. The proposed technique’s effectiveness is demonstrated through experiments on a wearable electronics prototype and system-on-chip (SoC) under a variety of practical scenarios. Experimental results show the proposed detection technique enables a high overall detection coverage for malicious activities of varying types with 0.8 s monitoring time overhead, which is negligible.

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Section: Related Workmentioning

confidence: 99%

Malicious Activity Detection in Lightweight Wearable and IoT Devices Using Signal Stitching

Karabacak

Ogras

Ozev

2021

Sensors

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“…In this four inputs are given which are randomly selected data bits form packets. The motivation for adopting this Trojan model was taken from Yu, Q. and Frey [11].…”

Section: B Activation Mechanism Of Trojanmentioning

confidence: 99%

A Method to Detect and Avoid Hardware Trojan for Network-on-Chip Architecture based on Error Correction Code and Junction Router (ECCJR)

Gondal¹,

Fayyaz²,

Aftab³

et al. 2020

IJACSA

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Modern technologies has changed our life, such as everywhere computing communication and internet. Number of transistors increasing in a system day by day and this trend will continue further. The wire connection is easily breakable and not a reliable technology in field of networks. In conventional network dedicated wired path is used among the intellectual property (IP) core for the purpose of communication and due to this wired connection network is not reliable and not scalable. Network-on-Chip Architecture was introduced to solve these problems and gave notable improvements over conventional bus and crossbar communication architectures. Many companies prefer third party vendors for the development of their design in order to reduce the cost. It gives advantage but due to the access of design anyone can do changes at any stage of development cycle. This type of malicious modification of hardware during design or fabrication process is known as Hardware Trojan (HT). It can change the functional behavior of a system or may leak the secret information of critical application which results in degradation of system performance. The proposed research is based on combination of Error Correcting Code and Junction router to detect and avoid HT which can be used for reliable communication in NoC architecture. Simulation results showed good performance of proposed algorithm in term of Packet Latency and Reliability.

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“…It can be implemented in NoC NI to prevent covert backdoor activation and reduce the chance of a successful side-channel attack [23]. In [24], Yu and Frey exploit transient and permanent error control methods to address HT issues in NoC links, improving the network average latency by up to 44.7% over the rerouting approach.…”

Section: B Hardware-based Techniquesmentioning

confidence: 99%

A Benchmark Suite of Hardware Trojans for On-Chip Networks

et al. 2019

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As recently studied, network-on-chip (NoC) suffers growing threats from hardware trojans (HTs), leading to performance degradation or information leakage when it provides communication service in many/multi-core systems. Therefore, defense techniques against NoC HTs experience rapid development in recent years. However, to the best of our knowledge, there are few standard benchmarks developed for the defense techniques evaluation. To address this issue, in this paper, we design a suite of benchmarks which involves multiple NoCs with different HTs, so that researchers can compare various HT defense methods fairly by making use of them. We first briefly introduce the features of target NoC and its infected modules in our benchmarks, and then, detail the design of our NoC HTs in a one-by-one manner. Finally, we evaluate our benchmarks through extensive simulations and report the circuit cost of NoC HTs in terms of area and power consumption, as well as their effects on NoC performance. Besides, comprehensive experiments, including functional testing and side channel analysis are performed to assess the stealthiness of our HTs.INDEX TERMS Benchmarks, hardware trojan, network-on-chip.

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Exploiting error control approaches for Hardware Trojans on Network-on-Chip links

Cited by 31 publications

References 27 publications

Malicious Activity Detection in Lightweight Wearable and IoT Devices Using Signal Stitching

Malicious Activity Detection in Lightweight Wearable and IoT Devices Using Signal Stitching

A Method to Detect and Avoid Hardware Trojan for Network-on-Chip Architecture based on Error Correction Code and Junction Router (ECCJR)

A Benchmark Suite of Hardware Trojans for On-Chip Networks

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