Experiences with an industrial analog fault simulator and engineering intuition

Abstract

While working with designers and DFT engineers in companies evaluating an "industrial-strength" analog fault simulator, it became apparent that intuition and theory often differ regarding random sampling of defects to simulate. This paper explores these differences. In one case, it was hoped that simulating more defects would increase the estimated coverage. In a second case, it was assumed that pre-simulation analysis of a circuit would more efficiently reveal defects that need to be simulated. In a third, engineering intuition said at least 1% of all potential defects must be simulated to estimate coverage. In a fourth case, it was thought that fault coverage for portions of a circuit could be gleaned from results for faults randomly injected into the whole circuit. In a fifth, the types of faults injected were assumed to greatly affect coverage. In a last case, intuitively it seemed that improving a test to detect the most-likely defects that were undetected would have the greatest impact on coverage.

Automatic test signal generation for mixed-signal integrated circuits using circuit partitioning and interval analysis

“…The literature on the testing of analog integrated circuits makes numerous references to the defect-oriented approach [9]- [11]. In contrast to the specification-based approach, where the targeted performances of a circuit are tested, the defect-oriented methodology aims at testing for the presence of a defect.…”

“…The distinction in the process of test generation appears as being important in the context of the recent developments in the field of analog testing. With the arrival of software enabling the automated computation of fault coverages [11], [13], it becomes possible to integrate a quality assessment step in the design flow of analog integrated circuits. The test designer knows to what extent an IC is actually tested and the list of faults which are not yet detected by the test program at hand is made available.…”

Analog Defect Injection and Fault Simulation Techniques: A Systematic Literature Review

“…The left side shows the calculation of the results at every time point, while the right side shows the calculation of results only on selected test points. primary contribution of this work was the automatic extraction of possible defect locations, computing the likelihood [52], [63] of each defect, and calculating the defect coverage of the circuit test list. The test list can be optimized by analyzing the simulation results, and keeping only those defects that allow achieving the highest coverage.…”