Evolution of radiation-induced soft errors in FinFET SRAMs under process variations beyond 22nm

Royer, Pablo; García‐Redondo, Fernando; López‐Vallejo, Marisa

doi:10.1109/nanoarch.2015.7180596

Cited by 9 publications

(11 citation statements)

References 18 publications

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“…It is known from the literature that radiation can lead to soft errors in FinFETs even at ground level [2], [6]. A number of works performed a comparative analysis regarding SEEs between FinFET and other technologies (conventional bulk CMOS and SOI) [2].…”

Section: Introductionmentioning

confidence: 99%

“…However, with the proximity of connections and the reduced supply voltage, FinFET-based SRAMs are becoming more susceptible to SEUs, even at ground level [6]. Traditionally, the major sources of radiation-induced soft errors at ground level or flight altitudes are: (1) alpha particles originated by the radioactive contamination existing in the packaging [13], [14]; (2) the high-energy neutrons from cosmic radiation (generating secondary reactions); and (3) the interaction of cosmic ray thermal neutrons with devices containing borophosphosilicate glass [14].…”

Section: Introductionmentioning

confidence: 99%

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Evaluating the Impact of Ionizing Particles on FinFET -based SRAMs with Weak Resistive Defects

Copetti

Medeiros

Taouil

et al. 2020

2020 IEEE Latin-American Test Symposium (LATS)

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Fin Field-Effect Transistor (FinFET) technology enables the continuous downscaling of Integrated Circuits (ICs), using the Complementary Metal-Oxide Semiconductor (CMOS) technology in accordance with the More Moore domain. Despite demonstrating improvements on short channel effect and overcoming the growing leakage problem of planar CMOS technology, the continuity of feature size miniaturization allowed by FinFETs tends to increase sensitivity to Single Event Upsets (SEUs) caused by ionizing particles, especially in blocks with higher transistor densities as Static Random-Access Memories (SRAMs). Variation during the manufacturing process has introduced different types of defects that directly affect the SRAM's reliability, such as weak resistive defects. As some of these defects may cause dynamic faults, which require more than one consecutive operation to sensitize the fault at the logic level, traditional test approaches may fail to detect them and test escapes can occur. These undetected faults associated with weak resistive defects may affect the FinFET-based SRAM reliability during the lifetime. In this context, this paper proposes to investigate the impact of ionizing particles on the reliability of FinFET-based SRAMs in the presence of weak resistive defects. Firstly, a TCAD model of a FinFET-based SRAM cell is proposed in order to allow the evaluation of the ionizing particle's impact. Then, SPICE simulations are performed considering the current pulse parameters obtained with TCAD. In this step, weak resistive defects are injected into the FinFETbased SRAM cell. Results show that weak defects may have either a positive or negative influence on the cell reliability against SEUs caused by ionizing particles.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Evaluating the Impact of Ionizing Particles on FinFET -based SRAMs with Weak Resistive Defects

Copetti

Medeiros

Taouil

et al. 2020

2020 IEEE Latin-American Test Symposium (LATS)

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show abstract

“…While in the subthreshold, even larger current pulse causes the flip due to the smaller node capacitance. The authors in [87,88] showed the difference in the charge collection property using a 3D device model for bulk/planner and FinFET. The result shows how different devices with different physical structure (e.g., bulk, FinFET, FDSOI) with various This is a critical challenge for ULP biomedical applications where a person is required to travel at different altitudes and the neutron flux increasing with altitude [5].…”

Section: Resultsmentioning

confidence: 99%

“…A reduced I ON results in a weaker feedback path for the storage node in a crossed couple bitcell. Since the first report of cosmic rays causing failures in 1975 space applications, a significant amount of work has been done, from device structure [86][87][88]90] to different protection schemes [91][92][93]. The device like FDSOI makes device robust against the particle strike by structure while Deeply Depleted Channel (DDC) [30] reduces doping concentration in the channel helps SEU reduction.…”

Section: Resultsmentioning

confidence: 99%

“…Because the soft-error is due to "extra" charge generation from alpha particles, the effect of node capacitance and supply voltage plays a very critical role in physical error generation. In [79][80][81], the authors demonstrated the impact of radiation on advanced technology nodes and high-performance systems with possible compensation using different design parameters and techniques (Sizing, ECC, BIST, etc. ), while the effect of technology scaling, Random Dopant Fluctuation (RDF), and process variations on soft-errors are addressed in [82][83][84].…”

Section: Soft Errors: Reliability Challenges At Ultra-low Voltagementioning

confidence: 99%

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Ultra-Low Power and Reliable SRAM for Systems-on-Chip

Patel¹

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The number of ubiquitous sensors has increased to more than double the human population and is expected to continue growing in the future. The pervasive use of sensors for applications such as personal healthcare and the Internet of Things (IoT) presents a growing sustainability challenge concerning the availability and accessibility of power sources. With 50 billion less BSN system. First, we explore different design knobs for an optimal SRAM design targeting ULP applications. These knobs include leveraging advanced fabrication technology, optimal device selection, circuit design techniques, and architectural techniques. Next, we evaluate the efficacy of different read and write peripheral assist techniques for improving reliability and energy efficiency of subthreshold SRAMs and provide stability, power, and performance trade-offs for system level optimization. The result of various optimization approaches resulted in a leakage and energy optimized SRAM operating over with leakage power reduced to 1.5 pW/bit while consuming only 6.24 pJ/access energy that is 40% more efficient than the previous version. To address a wide range of IoT applications with energy optimization, we propose a Canary sensor based minimum supply voltage (V M IN) tracking with optimal selection of the peripheral assist techniques. Later, we address the reliability issue at subthreshold operation using a process, voltage, and temperature (PVT) variation mitigation controller. Finally, the impact of the radiation-induced soft error is evaluated to provide a comprehensive study on reliability for the ULP SRAM at scaled V DD. Dedicating what all I learn in my life to 'Gurus' in my life-for enlightening my life with the knowledge, My Parents-for always giving me the courage to achieve impossible, My Wife-Pooja-for her unwavering love and motivation Meaning: Lead me from the unreal to the real; from darkness(ignorance) to light(knowledge); and from death to immortality. iv v Besides my life at the lab doing the research work, I immensely enjoyed my stay in Charlottesville. I am very much grateful to my neighbors for their pleasant company during my stay. I am also grateful to the members of Swadhyay Parivar for their selfless love. Last but never the least, I would like to thank my family members. I am very grateful for my parents, Naranbhai and Induben, for their continuous support and motivation for vii pursuing higher education. Especially, I thank my mother for always keeping me in her prayer while my father for giving me the courage to achieve whatever seems impossible to me. I thank my sister-Rinku-for her sisterly love. I cannot encompass my gratitude to my wife, Pooja, with the words for her support. She always been a lovely wife with continuous support. I am also indebted to almighty God for his blessing of two beautiful children, Samyak and Swara-my best stress busters! I cannot image myself completing my Ph.D. without the help of all these three-my wife and my kids-Thank you so much!

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Evaluation of Single Event Upset Susceptibility of FinFET-based SRAMs with Weak Resistive Defects

et al. 2021

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Fin Field-Effect Transistor (FinFET) technology enables the continuous downscaling of Integrated Circuits (ICs), using the Complementary Metal-Oxide Semiconductor (CMOS) technology in accordance with the More Moore domain. Despite demonstrating improvements on short channel effect and overcoming the growing leakage problem of planar CMOS technology, the continuity of feature size miniaturization tends to increase sensitivity to Single Event Upsets (SEUs) caused by ionizing particles, especially in blocks with higher transistor densities such as Static Random-Access Memories (SRAMs). Variation during the manufacturing process has introduced different types of defects that directly affect the SRAM's reliability, such as weak resistive defects. As some of these defects may cause dynamic faults, which require more than one consecutive operation to sensitize the fault at the logic level, traditional test approaches may fail to detect them, and test escapes may occur. These undetected faults, associated with weak resistive defects, may affect the FinFET-based SRAM reliability during its lifetime. In this context, this paper proposes to investigate the impact of ionizing particles on the reliability of FinFET-based SRAMs in the presence of weak resistive defects. Firstly, a TCAD model of a FinFET-based SRAM cell is proposed allowing the evaluation of the ionizing particle’s impact. Then, SPICE simulations are performed considering the current pulse parameters obtained with TCAD. In this step, weak resistive defects are injected into the FinFET-based SRAM cell. Results show that weak defects can positively or negatively influence the cell reliability against SEUs caused by ionizing particles.

show abstract

Evolution of radiation-induced soft errors in FinFET SRAMs under process variations beyond 22nm

Cited by 9 publications

References 18 publications

Evaluating the Impact of Ionizing Particles on FinFET -based SRAMs with Weak Resistive Defects

Evaluating the Impact of Ionizing Particles on FinFET -based SRAMs with Weak Resistive Defects

Ultra-Low Power and Reliable SRAM for Systems-on-Chip

Evaluation of Single Event Upset Susceptibility of FinFET-based SRAMs with Weak Resistive Defects

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