Estimating dynamic power consumption for memristor-based CiM architecture

Abstract

Nowadays, Computing-in-Memory (CiM) represents one of the most relevant solutions to deal with CMOS technological issues and several works have been proposed so far targeting front and back-end synthesis. However, a given CiM architecture can be synthesized depending on different parameters, leading to different implementations w.r.t. area, power consumption and performance. It is thus mandatory to have an evaluation framework to characterize the actual implementation depending on the above terms. This is even more important during the Design Exploration phase, in which many different implementations are explored to identify the best candidate w.r.t. the user requirements. In this work, we focus on the dynamic power consumption estimation of a given CiM implementation.Instead of resorting to a simulation-based power estimation, we propose an analytical approach that will dramatically speed up the estimation since no simulations are required. By comparing the proposed approach against the simulation-based method over a massive experimental campaign, we show that the accuracy of the estimation turns out to be very high.

A Design Space Exploration Framework for Memristor-Based Crossbar Architecture

“…The flow is depicted in Figure 3. Then, we employed XbarGen for obtaining statistics: occupied area, delay, and estimated energy consumption (switching activity) [28].…”

“…T C is thus the absolute time required to obtain the output values for a single crossbar. Finally, in Given from XbarGen, details available in [28] the case of several crossbars, the overall Delay time is computed as T C multiplied by N C . Again, the number of crossbars is provided by the logic synthesis.…”

“…As for previous ones, it is related to the number of memristors used for implementing the given Boolean function. To quantify the energy consumption, we do not perform any simulations, we simply apply the methodology described in [28] allowing to estimate the average case (i.e., the average energy consumption).…”

Emerging Technologies: Challenges and Opportunities for Logic Synthesis

“…Then, we leveraged XbarGen (an in-house tool [21], [22]) for obtaining statistics (i.e., Area and Delay). We carried out experiments over about 300 different combinational circuits given from [23]- [26] with up to 1763 inputs and 2048 outputs and up to 40 thousands general terms.…”