Edge computing requires highly energy efficient microprocessor units with embedded non-volatile memories to process data at IoT sensor nodes. Ferroelectric non-volatile memory devices are fast, low power and high endurance, and could greatly enhance energy-efficiency and allow flexibility for finer grain logic and memory. This paper will describe the basics of ferroelectric devices for both hysteretic (non-volatile memory) and negative capacitance (steep slope switch) devices, and then project how these can be used in low-power logic cell architectures and fine-grain logic-in-memory (LiM) circuits.
Emerging non-volatile memories are getting new interest in the system design community. They are used to design logic-in-memory circuits and propose alternatives to von-Neuman architectures. Hafnium oxide-based based ferroelectric memory technology, which is fully compatible with CMOS technologies is particularly interesting for logic-in-memory designs. Indeed, this compatibility leads to various possibilities for fine-grain logic in memory applications where the memory capable element is tightly integrated with the transistors in the system. Nonvolatile and energy efficient computing for Internet of things and embedded artificial intelligence are among the potential applications for this technology.In this article, we focus on ferroelectric field-effect transistors (FeFET) and present an overview of three different fine-grain logic-in-memory possibilities with FeFETs: custom operation designs, reconfigurable circuits and a hybrid memory element accessible by content or by address. All presented circuits have been designed within a test chip using 28nm technology provided by GLOBALFOUNDRIES.
Emerging non-volatile memory technologies are attracting interest from the system design level to implement alternatives to conventional von-Neumann computing architectures.In particular, the hafnium oxide-based ferroelectric memory technology is fully CMOS-compatible and has already been used for logic-in-memory architectures or compact ternary content addressable memory cells (TCAM). These enable the tight combination of different functionalities in the same circuit to reduce implementation area and energy consumption.In this article, we propose a new hybrid memory circuit, which combines ternary content addressable memory and normal memory capability: the TC-MEM. A 1-bit TC-MEM circuit is proposed and discussed in detail, both as a concept as well as through its implementation in a 28nm FeFET technology. Measurement results demonstrate the circuit functionality. We also discuss how to scale it to multi-bit circuits, as well as its use both as a TCAM and as a normal memory allowing the implementation of reversible functions using one memory table instead of two memory tables, and in-memory-computing concepts.
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