Work function modulation of PtSi by alloying with Yb to achieve ultra-low contact resistance for advanced CMOS was investigated. Pt x Yb y Si was formed by depositing Pt(6-18 nm)/Yb(2-14 nm)/ n-Si(100) stacked structure followed by 400-800 • C/1-30 min silicidation in N 2 ambient. It was found that barrier height for electron (Φ Bn ) was decreased as the silicidation temperature and time increased, and Φ Bn was reduced to 0.52 eV by depositing Pt(6 nm)/Yb(14 nm) followed by 800 • C/30 min silicidation. It was found that Yb diffusion toword the silicide/Si interface was enhanced, compared to the sample formed by 500-600 • C silicidation, which leads to further decrease of Φ Bn . The estimated effective work function of PtSi decreased from 4.92 eV to 4.57 eV. Keywords: PtSi, YbSi, barrier height, work function, sputtering Classification: Electronic materials, semiconductor materials