Energy-efficient radiation hardened SRAM cell for low voltage terrestrial applications

Prasad, Govind; Mandi, Bipin Chandra; Ali, Maifuz

doi:10.1016/j.mejo.2021.105340

Cited by 13 publications

(3 citation statements)

References 36 publications

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“…The variable parameters of the transistor, such as channel length, oxide thickness, and channel width, can alter during fabrication. A computational method called Monte Carlo (MC) Simulation, one can examine the statistical fluctuation in an output parameter of design [20]- [25]. The mean (µ) and standard deviation (σ) of these parameters are provided by MC Simulation in order to aid designers in evaluating the variation and making defensible decisions regarding design changes.…”

Section: E Statistical Analysis and Comparison Of Radiation-hardened ...mentioning

confidence: 99%

Enhanced Critical Charge (Q cr ) and Highly Reliable Read-Decoupled Radiation-Hardened 14T SRAM cell for Aerospace Application

Ahirwar,

Pattanaik,

Srivast

2023

Preprint

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Due to technological advancements, the size of transistors and the spacing between them is decreasing, resulting in a reduction in the critical charge of sensitive nodes. This decrease in critical charge makes these nodes more susceptible to disturbances and errors in static random access memory (SRAM) cells used in aerospace applications. To address this, a proposed 14T SRAM cell with polarity hardening technology is introduced in this paper, which reduces the number of sensitive nodes and enables recovery from single-event-multiple-effect (SEME) based on all single-event upset (SEU) recovery techniques. The simulation results conducted on the United Microelectronics Corporation (UMC) 65 nm CMOS commercial standard process demonstrate that the proposed 14T SRAM cell reduces both SEU and SEME. A comparative study is performed between the proposed 14T cell and other radiation-hardened SRAM cells, including DICE, SAR14T, RSP14T, RHBD14T, and NRHC14T, to assess the relative performance of the proposed cell. The proposed 14T cell for SRAM exhibits 40.42% and 21.39% improvements in write stability compared to existing cells like DICE and RSP14T, as well as 25.08% and 19.09% improvements in read stability compared to RHBD14T and RSP14T. It also shows enhancements of 81.88%, 76.82%, 57.83%, and 10.25% in critical charge value compared to RHBD14T, NRHC14T, SAR14T, and RSP14T, respectively, better stability, and improved overall performance, making it suitable for aerospace applications. Monte Carlo (MC) simulations have verified its ability to recover from SEU and SEME, with zero percent failure probability during read, write, and hold operations at different supply voltages.

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Section: E Statistical Analysis and Comparison Of Radiation-hardened ...mentioning

confidence: 99%

Enhanced Critical Charge (Q cr ) and Highly Reliable Read-Decoupled Radiation-Hardened 14T SRAM cell for Aerospace Application

Ahirwar,

Pattanaik,

Srivast

2023

Preprint

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“…Its principle is to combine circuit structure and layout structure and use circuit feedback loop to realize data recovery of storage nodes. The design methods are mainly divided into the following types: (1) radiation‐hardened design based on cross‐coupling feedback structure, such as We‐Quatro, 12 QUCCE12T, 13 SIS10T, 14 and 12T 15 circuits, which use multi‐channel read/write and feedback loop multiplexing to improve the circuit performance, but the multi‐node upset recovery performance is limited; (2) using the characteristics of transistor charge collection, such as polarity hardening method, node data can only upset to one direction, such as RHPD‐12T, 16 SARP12T, 17 and SEA14T 18 ; this method reduces the node voltage swing, often resulting in the reduction of cell noise tolerance; (3) combine circuit design with layout hardened design methods, such as RSP14T, 19 which requires a large amount of computing resources due to its complicated verification method.…”

Section: Introductionmentioning

confidence: 99%

Write‐enhanced and radiation‐hardened SRAM for multi‐node upset tolerance in space‐radiation environments

Zhao

Dong

Peng

et al. 2022

Circuit Theory & Apps

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Summary As transistor feature size is scaling down, the probability of charge sharing in a space‐radiation environment increases because of the reduced distance between adjacent transistors. The single‐event multiple‐node upset (SEMNU) caused by charge sharing is a major source of data errors in high‐density static random‐access memory (SRAM). In this paper, a radiation‐hardened SRAM using polarity hardening is proposed. Compared to other cells (RHPD‐12T, RSP14T, SEA14T, We‐Quatro, QUCCE12T, SARP12T, SIS10T, and 12T), the proposed RHC‐14T cell saves 8.47%, 91.34%, 162.71%, ‐20.63%, −20.50%, 113.18%, 63.27%, and 20.60% of the read‐delay time and 7.96%, 66.17%, 68.16%, 57.71%, 22.39%, 12.44%, 1,010.45%, and 13.43% of the write‐delay time, respectively. Moreover, this excellent performance entails only minimal power consumption. The proposed cell can work well in the radiation‐intensive space environment.

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“…So far, various differential (dual) and single bitline radiation hardened SRAM cells have been published by researchers which can tolerate SNUs and MNUs, in typical types (based on basic structure in radiation hardened memory cells such as dual interlocked storage cell (DICE), 11 Quatro, 12 ), terrestrial (low-orbit) and aerospace (highorbit) applications using RHDB and layout approaches. [13][14][15][16][17][18][19][20][21][22][23][24][25] In the literature, 19,20 some asymmetrical hardened SRAM cells, where some symmetrical bitline hardened SRAM cells in literatures, [6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21] are proposed. Also, single bitline (or single-ended) hardened SRAM cells based on Muller C-elements are proposed in referances.…”

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confidence: 99%

Wrap-Gate CNT-MOSFET Based SRAM Bit-Cell with Asymmetrical Ground Gating and Built-In Read-Assist Schemes for Application in Limited-Energy Environments

Darabi¹,

Salehi²,

Abiri³

2022

ECS J. Solid State Sci. Technol.

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We propose a novel design of an ultra-low power radiation-hardened single-ended (UPRHSE) SRAM bit-cell using the GAA CNT-GDI method. In the structure of bit-cell to improve read-/hold-stability and expand write-ability several schemes have been used such as asymmetric virtual ground gating, built-in read-assist and the multi-diameter/chirality for CNTs. Also, to investigate single/double upsets, injection circuit model using the structure of the T-connected pseudo resistors is proposed. The results of extensive Monte-Carlo simulations to evaluate the proposed bit-cell indicate larger noise margins, acceptable yield, less sensitivity to PVT variations, and higher critical charge. Moreover, the suggested bit-cell has more robustness to soft errors with high reliability of data storage in the presence of critical voltage conditions, and better results in other comprehensive figures of merit as compared to state-of-the-art bit-cells in the 16 nm technology. Finally, the proposed bit-cell in a real application is used to store data from two-layer quick-response code-based in terrestrial environments. The results show better performance of the bit-cell in terms of a comprehensive FoM, which provides more effective trade-off between the hardware efficiency and quality metrics to evaluate the appropriate accuracy in the pixel-by-pixel image as compared to other well-known counterpart designs.

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Energy-efficient radiation hardened SRAM cell for low voltage terrestrial applications

Cited by 13 publications

References 36 publications

Enhanced Critical Charge (Q cr ) and Highly Reliable Read-Decoupled Radiation-Hardened 14T SRAM cell for Aerospace Application

Enhanced Critical Charge (Q cr ) and Highly Reliable Read-Decoupled Radiation-Hardened 14T SRAM cell for Aerospace Application

Write‐enhanced and radiation‐hardened SRAM for multi‐node upset tolerance in space‐radiation environments

Wrap-Gate CNT-MOSFET Based SRAM Bit-Cell with Asymmetrical Ground Gating and Built-In Read-Assist Schemes for Application in Limited-Energy Environments

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