Write‐enhanced and radiation‐hardened SRAM for multi‐node upset tolerance in space‐radiation environments

Abstract

Summary As transistor feature size is scaling down, the probability of charge sharing in a space‐radiation environment increases because of the reduced distance between adjacent transistors. The single‐event multiple‐node upset (SEMNU) caused by charge sharing is a major source of data errors in high‐density static random‐access memory (SRAM). In this paper, a radiation‐hardened SRAM using polarity hardening is proposed. Compared to other cells (RHPD‐12T, RSP14T, SEA14T, We‐Quatro, QUCCE12T, SARP12T, SIS10T, and 12T), the proposed RHC‐14T cell saves 8.47%, 91.34%, 162.71%, ‐20.63%, −20.50%, 113.18%, 63.27%, and 20.60% of the read‐delay time and 7.96%, 66.17%, 68.16%, 57.71%, 22.39%, 12.44%, 1,010.45%, and 13.43% of the write‐delay time, respectively. Moreover, this excellent performance entails only minimal power consumption. The proposed cell can work well in the radiation‐intensive space environment.

Design of SEU and DNU‐resistant SRAM cells based on polarity reinforcement feature

“…The fundamental functions include data holding, data writing, and data reading. 9 3 | PRF-18 T CELL RADIATION RESISTANCE ANALYSIS…”

“…In Figure 3, the fundamental function simulation waveform of PRF‐18 T is shown, including the storage node as well as the control line. The fundamental functions include data holding, data writing, and data reading 9 …”

Low cost and high performance double‐node upset resilient latch for low orbit space applications

“…Rather than causing permanent damage to the electronic circuit, such SEU interrupts the operation, corrupts the data, and results in execution errors. Due to the transient nature of an SEU, it is also termed as soft error (SE) 3,4 . Since the latch is the basic sequential element, its ability to resist the SEU has direct impact on robustness of the ICs used in space like radiation‐prone environment.…”

“…Using the RHBD approaches, single node upset (SNU) hardened latches such as SEUT, 7 SNUSH, 8 and RH‐1 9 have recently been proposed. However, aggressive scaling of technology node has also raised the concern of multinode upsets (MNU) 1–4,10,11 . In modern IC, the transistors are positioned closer together, and due to the phenomena of charge sharing, a single event's accumulated charge is shared between multiple nodes.…”

“…However, aggressive scaling of technology node has also raised the concern of multinode upsets (MNU). [1][2][3][4]10,11 In modern IC, the transistors are positioned closer together, and due to the phenomena of charge sharing, a single event's accumulated charge is shared between multiple nodes. If two nearby nodes share the charge, it is termed to as double-node upset (DNU); and SNU-hardened techniques are inefficient and inadequately robust when DNU happens.…”