Elevated temperature stability of GaAs digital integrated circuits

Applied Physics Letters

Choi

et al. 2000

A solid-source molecular beam epitaxy has been used to grow Al-free InGaP/GaAs/InGaAs in-plane side emitting laser (IPSELs) devices on foundry available GaAs integrated circuits (IC) chips with integrated metal–semiconductor–metal photodetectors. The GaAs IC chips were cleaned at low temperature (470 °C) by monoatomic hydrogen prior to epitaxy. Br2 reactive ion etching was used after growth to make laser facets and parabolic mirrors for vertical emission. Using these techniques, we obtained laser emission from the integrated IPSEL devices, suggesting that these devices may be an alternative approach to that offered by vertical cavity surface emitting lasers in the fabrication of optoelectronic integrated devices.

Section: ͓S0003-6951͑00͒03250-2͔mentioning

confidence: 99%

Solid-source molecular-beam epitaxy for monolithic integration of laser emitters and photodetectors on GaAs chips

Postigo

Applied Physics Letters

Choi

et al. 2000

“…Work on EoE began [1][2][3][4][5][6][7][8][9][10][11][12][13][14] at the Massachusetts Institute of Technology ͑MIT͒ in 1990. Initial results included the fabrication of LED-based neural-network optoelectronic integrated circuits 4 ͑OEICs͒ as well as the integration of resonant tunneling diodes 7 ͑RTDs͒ and surface-normal multiple-quantum-well modulators 8 ͓also known as selfelectro-optic devices ͑SEEDs͔͒.…”

Section: Introductionmentioning

confidence: 99%

Epitaxy-on-Electronics technology for monolithic optoelectronic integration: foundations, development, and status

Ahadian

1998

Opt. Eng

Optoelectronic very large scale integrated (OE-VLSI) circuits are a basic component of optical interconnects proposed to overcome the limitations of high-speed electrical interconnects. Epitaxy-onelectronics (EoE), a monolithic integration technology capable of combining thousands of optoelectronic devices with VLSI-complexity GaAs Electronics, is reviewed. The fundamental assumptions on which the EoE technology is founded are explained and the development of the EoE integration process is reviewed. Then, the recently completed OPTOCHIP research foundry project, which made LED-based optoelectronic integrated circuits (OEICs) available to optical interconnect researchers, is described. Finally, integrated LED, photodetector, and circuit characterization results are detailed. These results show the utility of EoE OEICs in implementing optical interconnect architectures and point out current performance limitations. © 1998 Society of Photo-Optical Instrumentation Engineers. [S0091-3286(98)01012-5]

“…through MOSIS) VLSI GaAs MESFET integrated circuits are electrically stable after thermal cycles of up to 3 h at 500 "C with minimal shifts after 5 min at 600 OC followed by 5 h at 530 "C [1]- [5], [8] (in [8], an extensive experimental and modeling study of Vitesse HGaAs3 device and circuit time-temperature stability; upper-level interconnect and ohmic-contact metallurgical reactions are detailed). A novel optoelectronic integration technique was proposed based on this circuit stability and consequently the monolithic integration of LED's and GaAs circuits by molecular beam epitaxial (MBE) growth, to form an optoelectronic thresholding circuit, was demonstrated 111, [4]- [5].…”

mentioning

confidence: 99%

“…Five minutes later the native oxide in the dielectric growth windows on the chips was assumed to be desorbed. This is short enough to not significantly effect the MESFET's but it may impact the tungsten-plated aluminum interconnect metallization [8]. would be prefered [9].…”

mentioning

confidence: 99%

“…Dozens of such optoelectronic circuits are also on this chip and surround the WTA circuit. All electrical devices on the chip function, but with some degradation (i.e., saturation current reduced by 10%) caused by long periods at temperatures in excess of 500 "C. While no such shifts would be present for growth temperatures below 500 "C, which is very desirable, these changes are predictable and can be offset by proper design scaling (e.g., 10% gate width increase) [2], [8]. This is not possible for growth temperatures exceeding 530 "C. I-V and L-I curves from LED's fabricated in the epitaxial wells and in the bulk control wafer show no discernible differences (VTH typically 1.2 V), as reported for previous LED integrations [5].…”

mentioning

confidence: 99%

See 1 more Smart Citation

Monolithic optoelectronic circuit design and fabrication by epitaxial growth on commercial VLSI GaAs MESFET's

Shenoy

IEEE Photon. Technol. Lett.

Grot

1995

Self Cite

Abshct-A technique for realizing large-scale monolithic OEIC's, which involves epitaxially growing GaAs-based heterostructures on fully metallized commercial VLSI GaAs MES-FET integrated circuits, has recently been reported. In the initial work the circuits and LED's occupied distinct halves of a chip, the dielectric growth window was wet-etched after circuit fabrication, and the LED's required both n and p ohmic contacts to be formed after epitaxial growth. In this letter we report the use of standard foundry process etches to open dielectric growth windows intermixed with circuitry and the growth of n-side-down LED's on a sourcddrain ion-implanted n+ region serving as the n ohmic contact. A winner-take-all neural circuit is demonstrated using these advances, which are important steps toward realizing higher levels of circuit integration.T HAS RECENTLY been reported that fully processed,