Electro-thermal high-level modeling of integrated circuits

Krencker, Jean-Christophe; Kammerer, Jean-Baptiste; Hervé, Y.; Hébrard, Luc

doi:10.1016/j.mejo.2014.02.001

Cited by 8 publications

(3 citation statements)

References 16 publications

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“…In order to achieve our electro-thermal simulations, we use the electro-thermal simulation tool presented and validated in [10], [11]. This tool provides means to perform direct electro-thermal simulations in a standard CAD environment, the Cadence® environment in our case.…”

Section: Simulation Resultsmentioning

confidence: 99%

Electrothermal analysis of 3D integrated ultra-fast image sensor with digital frame storage

Bonnard

Garci

Kammerer

et al. 2015

2015 21st International Workshop on Thermal Investigations of ICs and Systems (THERMINIC)

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This paper presents a 3D integrated ultra-fast CMOS image sensor (CIS) with on-chip A/D conversions and digital storage.After an analysis of the burst IS structure and power consumption, it appears that the power density is very high (> 0.1 W/mm²) during the burst video acquisition. Therefore, to evaluate the risk of overheating, a study of the thermal dissipation in the 3D stack is described here. This study has been carried out for different operating modes. The thermal simulations show that in single burst mode, the acquisition time is too short to produce critical overheating. Even in post-event triggering acquisition, the temperature rise should not affect the image quality. Nevertheless, for some high speed applications, it can be mandatory to repeat the burst acquisition over time. This paper demonstrates that for a multi burst mode working in postevent triggering acquisition, the 3D stack can reach high temperature that can damage the system.

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Section: Simulation Resultsmentioning

confidence: 99%

Electrothermal analysis of 3D integrated ultra-fast image sensor with digital frame storage

Bonnard

Garci

Kammerer

et al. 2015

2015 21st International Workshop on Thermal Investigations of ICs and Systems (THERMINIC)

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“…In order to achieve our electro-thermal simulations, we use the electro-thermal simulation tool developed by our group and presented in [12,13,14]. Our simulation technique uses a simple principle based on the direct method approach [15].…”

Section: The Electro-thermal Simulation Toolmentioning

confidence: 99%

Lifetime of CMOS circuits evaluation by means of electro-thermal simulations

Garci

Kammerer

Hébrard

2013

19th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC)

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An electro-thermal compact model of MOSFET which takes the hot carriers effects into account is presented in this paper. This new compact model evaluates the threshold voltage shift as well as the mobility reduction induced by the increase of the density of states at the Si/SiO 2 interface produced by hot carriers. This physical effect depends on the biasing conditions and the temperature of the device. Results obtained on a single transistor are presented and compared to experimental results. Electro-thermal simulations at chip level are presented through a circuit dedicated to effective aging evaluation. Simulation results clearly show how the temperature reduces the lifetime of circuits. This new electro-thermal compact model coupled to our electro-thermal simulation tool offers the possibility to evaluate the lifetime of analog CMOS circuit.

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“…Architectural design flow includes a 3D thermal model [8], high-level 3D model [9] and partitionning methods for temperature and noise aware circuit models [10] [11] [12]. It also covers the Physical design flow (DRM, DK).…”

Section: Introductionmentioning

confidence: 99%

3D Integration of CMOS image sensor with coprocessor using TSV last and micro-bumps technologies

Coudrain

Henry²,

Berthelot³

et al. 2013

2013 IEEE 63rd Electronic Components and Technology Conference

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This paper presents the prototype of a 3D circuit in which a Wafer Level Packaged CMOS image sensor is vertically assembled with an image signal processor in a face-to-back integration scheme. The design flow used to hybrydize the two circuits will be fully described, up to physical implementation. The process technology carried out will be presented in a 200 mm environment. Finally, the 3D assembly will be successfully assessed, concretising the realism of a 3D technology for nomadic imaging systems.

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Electro-thermal high-level modeling of integrated circuits

Cited by 8 publications

References 16 publications

Electrothermal analysis of 3D integrated ultra-fast image sensor with digital frame storage

Electrothermal analysis of 3D integrated ultra-fast image sensor with digital frame storage

Lifetime of CMOS circuits evaluation by means of electro-thermal simulations

3D Integration of CMOS image sensor with coprocessor using TSV last and micro-bumps technologies

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