Electrical characteristics of metal-oxide-semiconductor capacitors on p-GaAs using atomic layer deposition of ultrathin HfAlO gate dielectric

Abstract

Properties of ultrathin HfAlO gate dielectrics on sulfur-passivated p-GaAs were investigated using capacitance-voltage and current-voltage measurement techniques and angle-resolved x-ray photoelectron spectroscopy. By optimizing the individual layer thickness of atomic-layer deposited Al2O3 and HfO2 and the postdeposition anneal (PDA) conditions, a low equivalent oxide thickness of 1.6 nm, low gate leakage of 2.6×10−3 A/cm2 at Vg=Vfb−1 V, and excellent frequency dispersion characteristics were obtained. No interfacial As–O bonding and only a small amount of Ga–O bonding were detected after PDA at 500 °C. These results reveal a good quality dielectric interface on GaAs without an additional interface passivation layer.

Effective reduction of interfacial traps in Al2O3/GaAs (001) gate stacks using surface engineering and thermal annealing

“…5,6 However, unlike GGO, most other high-dielectrics on GaAs exhibit high D it values at the GaAs midgap region, 7 resulting in serious Fermi-level pinning, and thus preventing a proper inversion response required for the inversion-channel GaAs MOS devices. Sulfur passivation [8][9][10] and/or insertion of interfacial passivation layer of Si or Ge ͑Refs. 11-13͒ on GaAs may have decreased D it values in regions away from the midgap, but fail to effectively reduce the high midgap D it peak.…”

Gate Stack Reliability of High-Mobility 4H SiC Lateral MOSFETs with Deposited Al2O3 Gate Dielectric

“…The gate dielectric was formed using atomic layer deposition (ALD) of Al 2 O 3 , depositing 25 nm using alternating cycles of H 2 O and trimethyl aluminum (TMA), at a 200 °C growth temperature [12]. After a 400 °C 30 sec post-deposition anneal in N 2 , an 80 nm W gate electrode was deposited using RF-magnetron sputter deposition.…”

Charge trapping and reliability characteristics of ultra-thin HfYOx films on n-GaAs substrates

“…Furthermore, high-k dielectrics also provide an excellent opportunity for choosing alternative channel materials such as GaAs, InP, InGaAs for the requirement of ultra high-speed logic devices. Recently, GaAs is being considered as a potential channel material because of its augmented electron mobility, high breakdown strength and large band gap compared to Si [3][4][5][6] and successful integration of highk dielectrics on GaAs substrates draws significant attention to take advanced CMOS technology beyond 22 nm technology node [7][8][9][10][11][12]. However, reliability of ultra-thin high-k gate dielectrics have become more important, as high field applied to gate dielectric results in higher trap generation and oxide breakdown.…”