Effect of substrate orientation and crystal anisotropy on the thermally oxidized SiO2/SiC interface

Shenoy, J. N.; Das, Mrinal K.; Cooper, James A.; Melloch, M. R.; Palmour, John W.

doi:10.1063/1.361244

Cited by 69 publications

(33 citation statements)

References 19 publications

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“…It is demonstrated that D it of MOS capacitors grown on Si(0001)-or a-plane (1120) /(1 100)-faces is lower than grown on C (000 1)-faces [10,16,17]. Faces, which are tilted by a certain angle with respect to the c-axis, provide different D it -values [18].…”

mentioning

confidence: 97%

Alternative techniques to reduce interface traps in n‐type 4H‐SiC MOS capacitors

Pensl

Beljakowa

Frank

et al. 2008

Physica Status Solidi (b)

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Several alternative oxidation techniques are developed and tested with the aim to reduce the high density of interface traps Dit in n‐type 4H‐SiC MOS capacitors. A lamp furnace in combination with a microwave plasma is employed to grow thin oxide layers, which are used for an insulating stack (SiO2 and Al2O3). The treatment of the oxide with nitrogen is another way to lower Dit. We introduce N atoms prior to the oxidation by ion implantation. During the oxidation process, the implanted N‐profile is redistributed; a considerable amount of the implanted N is accumulated at the SiC/SiO2‐interface, which leads to a strong reduction of Dit and a large negative flatband voltage. The negative flatband voltage can largely be compensated by coimplantation of aluminum. A model is proposed, which explains the passivation of interface traps in n‐type 4H‐SiC MOS capacitors. (© 2008 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

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mentioning

confidence: 97%

Alternative techniques to reduce interface traps in n‐type 4H‐SiC MOS capacitors

Pensl

Beljakowa

Frank

et al. 2008

Physica Status Solidi (b)

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“…The oxidation rate of 4H-SiC depends upon the orientation of 4H-SiC wafers. This has been determined experimentally by Shenoy et al [25]. The oxidation rate for C-face is three to five times faster than for the Si-face.…”

Section: Oxidationmentioning

confidence: 65%

Advanced SiC/Oxide Interface Passivation

Sharma¹

2017

New Research on Silicon - Structure, Properties, Technology

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To save energy on an electric power grid, the idea of redesigned 'micro-grids' has been proposed. Implementation of this concept needs power devices that can operate at higher switching speeds and block voltages of up to 20 kV. Out of SiC and GaN wide band gap semiconductors, the former is more suitable for low-as well as high-voltage ranges. SiC exists in different polytypes 3C-, 4H-and 6H-. 4H-SiC due to its wider band gap, 3.26 eV has higher critical electric field of breakdown (E c ) and electron bulk mobility compared to 6H-SiC. Even with all these benefits 4H-SiC full potential has not yet been realized. This is due to high trap densities (D it ) at the interface. In addition to 4H-polytype, in recent years, there is a reignited interest on cubic silicon carbide (3C-SiC), which can be potentially grown heteroepitaxially on 12″ Si substrates, as it would result in a drastic cost reduction of semiconductor devices compared to the successful but exorbitantly expensive SiC hexagonal polytype technology (4H-SiC). In this chapter, we discuss and summarize all different interface passivation techniques or processes that have led to a vast improvement of these (4H-or 3C-SiC/SiO 2 ) interfaces electrically.

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“…20 However, the carbon itself is unlikely to cause the oxide degradation: the oxides thermally grown on silicon carbide show good insulating properties despite a permanent carbon supply from the substrate. [21][22][23] Apparently then, the conducting defects in the SIMOX BOX are mainly related to the clusters of excess silicon. Indeed, etch-back experiments reveal the presence of defects protruding all the way through the BOX layer into the superficial silicon, 24 indicating a laterally inhomogeneous phase separation in the BOX.…”

Section: Defects In the Buried Sio 2 Of Simox Structures: An Overmentioning

confidence: 99%

Structural inhomogeneity and silicon enrichment of buried SiO2 layers formed by oxygen ion implantation in silicon

Afanasʼev

Stesmans

Revesz³

et al. 1997

Journal of Applied Physics

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The microstructure and electrical properties of buried SiO2 layers produced in silicon by the implantation of oxygen ions are analyzed in terms of implantation parameters and supplemental incorporation of oxygen. The buried oxides show inhomogeneous etching in aqueous HF, revealing the presence of a crystalline oxide phase and Si-enriched regions. Silicon enrichment in SiO2 is found in the form of Si inclusions and oxygen deficient network defects. The former are found to be sensitive to the oxygen implantation profile, and may arise as a result of a blockage of Si outdiffusion by crystalline oxide inclusions. The network defects, in turn, are predominantly generated during high temperature postimplantation annealing, caused possibly by some mechanism of silicon transport from the interfaces into the bulk of oxide. The electron trapping and electrical conduction characteristics of buried oxides are found to correlate with the density and size of the inhomogeneities. By contrast, hole trapping and the generation of positive charge at the Si/oxide interfaces by exposure to hydrogen at elevated temperature are controlled by the network defects in the bulk of the oxide and in the near interfacial layers, respectively.

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Effect of substrate orientation and crystal anisotropy on the thermally oxidized SiO2/SiC interface

Cited by 69 publications

References 19 publications

Alternative techniques to reduce interface traps in n‐type 4H‐SiC MOS capacitors

Alternative techniques to reduce interface traps in n‐type 4H‐SiC MOS capacitors

Advanced SiC/Oxide Interface Passivation

Structural inhomogeneity and silicon enrichment of buried SiO2 layers formed by oxygen ion implantation in silicon

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