Effect of Grain Boundary Protrusion on Electrical Performance of Low Temperature Polycrystalline Silicon Thin Film Transistors

Abstract

We studied the impact of grain boundary (GB) protrusion on the electrical properties of low temperature polycrystalline silicon thin film transistors. The analysis of atomic force microscopy and transmission electron microscopy images indicate the grain size of ∼350 nm and a protrusion height of ∼35 nm. The transfer and output characteristics are well fitted by technology computer-aided design using two different density of states for poly-Si grain and GB, respectively. From 2-D contour mapping, a drastic reduction of hole concentration (∼5 × 10 16 cm −3) at GB protrusion site was obtained as compared to the grain (∼3 × 10 18 cm −3). Trapping concentration at GB is much higher, which leads to the reduction in the mobility. INDEX TERMS Low temperature polycrystalline silicon (LTPS), thin-film transistors (TFTs), technology computer-aided design (TCAD).

Extremely foldable LTPS TFT backplane using blue laser annealing for low‐cost manufacturing of rollable and foldable AMOLED display

“…Additionally, the TFTs with small grain size and higher protrusions are more prone to be affected by the kink effect and/or hot carrier effect, due to drain‐induced barrier lowering. Note that BLA LTPS TFT has no kink effect in output characteristics with good stability under the hot carrier effect (not shown here) This high and nonuniform electric field at the grain boundary protrusion region for ELA TFT causes a significantly higher impact generation rate, which is evident from our previous TCAD simulation results 17,18 . Thus, the protrusion at grain boundary can increase the kink effect.…”

“…Note that BLA LTPS TFT has no kink effect in output characteristics with good stability under the hot carrier effect (not shown here) This high and nonuniform electric field at the grain boundary protrusion region for ELA TFT causes a significantly higher impact generation rate, which is evident from our previous TCAD simulation results. 17,18 Thus, the protrusion at grain boundary can increase the kink effect. The BLA TFTs without kink effect can be used for submicron LTPS TFT backplane for high-resolution AMOLED displays such as AR/VR applications.…”

Excellent Mechanical Durability of In‐Folding Stress of Poly‐Si Thin‐Film Transistor on Plastic Substrate Compared with Out‐Folding: Generation of Gate Leakage Currents in Flexible Poly‐Si Thin‐Film Transistor by Out‐Folding and Bias‐Temperature Stress

“…The a‐Si layer was crystallized by ELA and then patterned to form active islands. [ 18 ] An 80 nm SiO 2 was deposited as the GI by PECVD at 360 °C followed by the deposition of 100 nm Mo layer as gate electrode by sputtering. The gate and GI were patterned, followed by the p+ doping of the source and drain regions by ion doping using B 2 H 6 .…”

“…[1][2][3][4][5] To realize a flexible active-matrix organic light-emitting diode (AMOLED) display, thin-film transistor (TFT) backplane should be fabricated on a plastic substrate. [6][7][8][9][10][11][12][13][14][15] The TFT technology for the flexible AMOLED is focused on low-temperature polycrystalline silicon (LTPS) TFT on flexible substrates, because poly-Si TFT has the advantages of large field-effect mobility (μ FE ) % 100 cm 2 V À1 s À1 [16][17][18][19] and excellent stability. [20] Excimer laser annealing (ELA) of a-Si is a typical method to get poly-Si on the glass, which is being used for OLED manufacturing.…”

“…The TFT technology for the flexible AMOLED is focused on low‐temperature polycrystalline silicon (LTPS) TFT on flexible substrates, because poly‐Si TFT has the advantages of large field‐effect mobility ( μ FE ) ≈ 100 cm 2 V −1 s −1 [ 16–19 ] and excellent stability. [ 20 ] Excimer laser annealing (ELA) of a‐Si is a typical method to get poly‐Si on the glass, which is being used for OLED manufacturing.…”