Dual-Wavelength Bit Input Optical RAM With Three SOA-XGM Switches

Fitsios, D.; Vagionas, Christos; Kanellos, George T.; Miliou, Amalia; Pleros, Nikos

doi:10.1109/lpt.2012.2197192

Cited by 17 publications

(19 citation statements)

References 10 publications

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“…Optical memories with impressive achievements with respect to speed, footprint and power consumption [2][3][4] have been reported so far, while important progress has been also made in optical RAM architectures 2 : by introducing wavelength diversity 2,5,6 and expanding more recently to the utilization of Wavelength Division Multiplexing (WDM) [7][8][9] concepts in optical RAM configurations, unique architectural perspectives for singleand multi-cell RAM banks have emerged, not being available in the electronic RAM domain. The use of WDM principles can yield increased degree of parallelism and resource sharing, reducing in this way the number of active components and associated energy requirements [7][8][9] .…”

Section: Introductionmentioning

confidence: 99%

Optical RAM row access using WDM-enabled all-passive row/column decoders

et al. 2014

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Towards achieving a functional RAM organization that reaps the advantages offered by optical technology, a complete set of optical peripheral modules, namely the Row (RD) and Column Decoder (CD) units, is required. In this perspective, we demonstrate an all-passive 2×4 optical RAM RD with row access operation and subsequent all-passive column decoding to control the access of WDM-formatted words in optical RAM rows. The 2×4 RD exploits a WDM-formatted 2-bit-long memory WordLine address along with its complementary value, all of them encoded on four different wavelengths and broadcasted to all RAM rows. The RD relies on an all-passive wavelength-selective filtering matrix (λ-matrix) that ensures a logical '0' output only at the selected RAM row. Subsequently, the RD output of each row drives the respective SOA-MZI-based Row Access Gate (AG) to grant/block the entry of the incoming data words to the whole memory row. In case of a selected row, the data word exits the row AG and enters the respective CD that relies on an allpassive wavelength-selective Arrayed Waveguide Grating (AWG) for decoding the word bits into their individual columns. Both RD and CD procedures are carried out without requiring any active devices, assuming that the memory address and data word bits as well as their inverted values will be available in their optical form by the CPU interface. Proof-of-concept experimental verification exploiting cascaded pairs of AWGs as the λ-matrix is demonstrated at 10Gb/s, providing error-free operation with a peak power penalty lower than 0.2dB for all optical word channels.

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Section: Introductionmentioning

confidence: 99%

Optical RAM row access using WDM-enabled all-passive row/column decoders

et al. 2014

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“…Semiconductor optical amplifiers (SOAs) are already a well-established solution in the cost-and energy-critical domain of optical access networks, performing in a variety of optical functionalities; optical amplification offered by SOAs integrated with Electro-absorption Modulators [1], [2] or colorless reflective modulation provided by Reflective Semiconductor Optical Amplifiers (RSOAs) [3], [4] are just some indicative examples, with energy consumption being in both cases a vital parameter. Moreover, SOAs have been shown to enable advanced functionalities like optical random access memory (RAM) [5], [6], optical cache [7] and memory peripherals [8] and also in the area of chip-scale circuitry for DataCom and ComputerCom applications, where high-integration densities are expected to significantly increase operational temperatures, affecting the circuit's operation besides requiring power-hungry external cooling.…”

Section: Introductionmentioning

confidence: 99%

High gain 1.3-μm GaInNAs SOA with fast gain dynamics and enhanced temperature stability

et al. 2014

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Semiconductor optical amplifiers (SOAs) are a well-established solution of optical access networks. They could prove an enabling technology for DataCom by offering extended range of active optical functionalities. However, in such costand energy-critical applications, high-integration densities increase the operational temperatures and require powerhungry external cooling. Taking a step further towards improving the cost and energy effectiveness of active optical components, we report on the development of a GaInNAs/GaAs (dilute nitride) SOA operating at 1.3μm that exhibits a gain value of 28 dB and combined with excellent temperature stability owing to the large conduction band offset between GaInNAs quantum well and GaAs barrier. Moreover, the characterization results reveal almost no gain variation around the 1320 nm region for a temperature range from 20 o to 50 o C. The gain recovery time attained values as short as 100 ps, allowing implementation of various signal processing functionalities at 10 Gb/s. The combined parameters are very attractive for application in photonic integrated circuits requiring uncooled operation and thus minimizing power consumption. Moreover, as a result of the insensitivity to heating issues, a higher number of active elements can be integrated on chip-scale circuitry, allowing for higher integration densities and more complex optical on-chip functions. Such component could prove essential for next generation DataCom networks.

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“…Despite a long history of optimization techniques for electronic mature electronic technology, state-of-theart electronic CAMs are still scaling in terms of frequency at a slow pace, limited by the well-known electronic memory bandwidth bottleneck [19,20] and seem incapable of keeping up with the increasing optical line rates [21]. This performance disparity is expected to continue impeding the routing system's performance, if relying solely on slow-performing CAMs, as the increasing optical line rates will further necessitate energy-hungry, cost-expensive optoelectronic header conversions with subsequent data-rate down-conversion [22][23][24], to realize AL searches in MHz-only performing electronic AL tables.Drawing from this memory bottleneck, there have been some recent advancements in photonic memories following different photonic integration approaches and architectural approaches to deliver speed, footprint, scalability and power consumption benefits [25][26][27][28][29][30][31][32][33][34][35][36][37][38][39][40][41][42]. However, the vast majority of photonic memory implementations so far reported have managed to develop only simplistic optical flip-flops (FFs) [32][33][34][35][36][37][38][39][40][41], that can only perform storing of the unitary bit.…”

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confidence: 99%

“…the access gate (AG) which allows for building more complex optical RAM cell layouts to support all RAM functionalities, i.e. read, write and block/grant access to the memory, to control the communication of the storage cell with the 'outer world' [25][26][27][28][29][30][31]. However, as in all these optical RAM cell demonstrations, the optical AGs have been mainly implemented as simple, unoptimized wavelength converters (WCs) [25][26][27][28][29][30][31], not tailored specifically for RAM operation, leaving room for further improvements in terms of high-speed operation.…”

mentioning

confidence: 99%

“…read, write and block/grant access to the memory, to control the communication of the storage cell with the 'outer world' [25][26][27][28][29][30][31]. However, as in all these optical RAM cell demonstrations, the optical AGs have been mainly implemented as simple, unoptimized wavelength converters (WCs) [25][26][27][28][29][30][31], not tailored specifically for RAM operation, leaving room for further improvements in terms of high-speed operation. As a result, optical RAM cell demonstrations have so far exhibited speed capabilities only up to 5 Gb s −1 [25,27] not managing to outperform the performance of state-of-the-art electronics RAMs [43][44][45][46][47][48][49][50][51][52][53].…”

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confidence: 99%

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Optical memory architectures for fast routing address look-up (AL) table operation

et al. 2019

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Today, the increasing demand for fast routing processes has turned the address look-up (AL) operation into one of the main critical performance operations in modern optical networks, since it conventionally relies on slow-performing AL tables. Specifically, AL memory tables are comprised of content addressable memories (CAMs) for storing a known route of the forwarding information base of the router, and random access memories (RAMs) for storing the respective output port for this route. They thus allow for a one-cycle search operation of a packet's destination address, yet they typically operate at speeds well below 1 GHz, in contrast with the vastly increasing optical line rates. In this paper, we present our overall vision towards light-based optical AL memory functionalities that may facilitate faster router AL operations, as the means to replace slow-performing electronic counterparts. In order to achieve this, we report on the development of a novel optical RAM cell architecture that performs for the first time with a speed of up to 10 Gb s −1 , as well as our latest works on multi-bit 10 Gb s −1 optical CAM cell architectures. Specifically, the proposed optical RAM cell exploits a semiconductor optical amplifier-Mach-Zehnder interferometer in a push-pull configuration and deep saturation regime, doubling the speed of prior optical RAM cell configurations. Errorfree write/read operation is demonstrated with a peak power penalty of 6.2 dB and 0.4 dB, respectively. Next, we present the recent progress on optical CAM cell architectures, starting with an experimental demonstration of a 2-bit optical CAM match-line architecture that achieves an exact bitwise search operation of an incoming 2-bit destination address at 10 Gb s −1 , while the analysis is also extended to a numerical evaluation of a multi-cell 4-bit CAM-based row architecture with wavelength division multiplexed outputs for fast parallel memory operations at speeds of up to 4×20 Gb s −1 . Finally, we present a comparative study between electronic and optical RAMs and CAMs in terms of energy and speed and discuss the further challenges towards our vision. entries, even causing the depletion of the remaining IPv4 address space and leading to the advent of an IPv6 protocol with a quadrupled need for address look-up (AL) requirements [5]. This increasing need for faster routing functionalities, including AL, which also requires fast hardware memories to perform fast look-up of the packet's destination address immediately upon its arrival and across the forwarding information base (FIB) of the router.On the path to speeding up hardware memory and lower latency times when fetching data, state-of-the-art highly performing electronic static random access memory (RAM) cell technology has managed to achieve operation up to 5 GHz [6][7][8]. However, RAMs are inherently limited in fast AL as, owing to the address-based fetching of data, they would require multiple sequential random access to the memory and consecutive searches of the desired content. As a re...

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Dual-Wavelength Bit Input Optical RAM With Three SOA-XGM Switches

Cited by 17 publications

References 10 publications

Optical RAM row access using WDM-enabled all-passive row/column decoders

Optical RAM row access using WDM-enabled all-passive row/column decoders

High gain 1.3-μm GaInNAs SOA with fast gain dynamics and enhanced temperature stability

Optical memory architectures for fast routing address look-up (AL) table operation

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