Demonstration of a Subthreshold FPGA Using Monolithically Integrated Graphene Interconnects

Lee, Kyeong-Jae; Park, Hyesung; Kong, Jing; Chandrakasan, Anantha P.

doi:10.1109/ted.2012.2225150

Cited by 18 publications

(6 citation statements)

References 31 publications

(22 reference statements)

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“…[24][25][26] Herein, that step is moved to the CMOS foundry stage, resulting in fewer post-CMOS steps for improved yield and scalability. Sufficient contact reliability between metal contact layers and graphene junction required via sidewall angle of less than 90 degrees, as illustrated in Fig.…”

Section: Resultsmentioning

confidence: 99%

“…Table 1 compares the post-CMOS process steps in this work with the process steps of three devices fabricated by other research groups. [24][25][26] As evident from Table 1, the process outlined in this work requires significantly fewer steps and represents an important reduction in process complexity. In this work, when combining process step reduction with optimized planarization foundry steps, there is evidence of higher device yield compared to previous iterations of our own device configurations.…”

Section: Graphene Junctionsmentioning

confidence: 99%

“…Moreover, the measured output of this sensor is frequency-modulated and is therefore less susceptible to amplitude-affecting non-idealities of the sensing path. To date, research on monolithic integration of CMOS and graphene has been limited to multi-layer graphene junctions, [24][25][26] partly due to the coverage and quality limits of large area CVD graphene at that time. In addition, the yield of the reported approaches is expected to be considerably low for monolayer graphene because of its much lower structural strength compared to multilayer graphene.…”

Section: Introductionmentioning

confidence: 99%

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3D integrated monolayer graphene–Si CMOS RF gas sensor platform

et al. 2017

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Integration of a complementary metal-oxide semiconductor (CMOS) and monolayer graphene is a significant step toward realizing low-cost, low-power, heterogeneous nanoelectronic devices based on two-dimensional materials such as gas sensors capable of enabling future mobile sensor networks for the Internet of Things (IoT). But CMOS and post-CMOS process parameters such as temperature and material limits, and the low-power requirements of untethered sensors in general, pose considerable barriers to heterogeneous integration. We demonstrate the first monolithically integrated CMOS-monolayer graphene gas sensor, with a minimal number of post-CMOS processing steps, to realize a gas sensor platform that combines the superior gas sensitivity of monolayer graphene with the low power consumption and cost advantages of a silicon CMOS platform. Mature 0.18 µm CMOS technology provides the driving circuit for directly integrated graphene chemiresistive junctions in a radio frequency (RF) circuit platform. This work provides important advances in scalable and feasible RF gas sensors specifically, and toward monolithic heterogeneous graphene-CMOS integration generally. 1-3 In these cases, power and size requirements are not critical, and such sensors tend to be large and bulky. But with the rapid expansion and prevalence of newer technologies like smart phones, cloud computing and the Internet of Things (IoT), mobile sensors are recognized as an essential component in future ubiquitous sensor networks. 4,5 The goals of IoT sensor networks require mobile and untethered sensors in quantities that negate any realistic possibility of individual sensor maintenance or battery replacement. The expectation is that the sheer number of future sensor devices, the "things" of IoT, will preclude human maintenance of individual nodes within large sensor networks. The implications for future device production are then twofold: the sensors must operate at low-power, and the cost of each device should be low enough that the expected orders of magnitude increase in sensor nodes is feasible. Much of current gas sensor research is therefore directed at the need for low-cost, low-power portable gas sensors, as well as integration with the technology platform best suited to meet that need: silicon complementary metal-oxide semiconductor (CMOS).Solid-state gas sensors cover a wide range of technologies, from microelectromechanical thermal and mass sensors to optical and chemiresistive sensors. 6,7 Of these, one of the most common is the chemisresistive sensor, whose relatively simple design and operation make it a strong candidate for CMOS integration.

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Section: Resultsmentioning

confidence: 99%

Section: Graphene Junctionsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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3D integrated monolayer graphene–Si CMOS RF gas sensor platform

et al. 2017

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“…Capacitance graphene wires based graphene system application and experimentally show the potential for ultralow power electronics [8].…”

Section: Lit Erat Ure Re Viewmentioning

confidence: 99%

Capacitance scaling based energy efficient FIR filter for digital signal processing

Pandey

Kumar

Das

et al. 2014

2014 International Conference on Reliability Optimization and Information Technology (ICROIT)

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In this work, we are implementing FIR Gaussian low pass filter using DSP slice available in 28nm Kintex-7 FPGA. In order to make energy efficient filter, we are using capacitance scaling. During capacitance scaling, we observe that there is no change in clock power, logic power, signal power and DSP power.But, there is significant reduction in lOs power, leakage power and total power of FIR filter on 28nm Kintex-7 FPGA. There is approx 44.74% reduction in lOs power when FIR filter operating frequency is SGHz, SOGHz, SOOGHz and lTHz and capacitance is scaled down from 2SpF to SpF. There is approx 87.6S% reduction in leakage power when FIR filter operating frequency is from SOOGHz to SGHz. There is approx 99 .S1 % reduction in leakage power when FIR filter operating frequency is from 1 THz to SGHz.

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“…This leads to the slower performance of circuits at sub‐threshold voltages than at super‐threshold voltages. Recent findings from fabrication of graphene nanoribbon interconnects for sub‐threshold FPGAs shows that they operate at about 150 KHz only [17]. For long global interconnects, buffer insertion is not feasible when they conduct sub‐threshold current [14, 16].…”

Section: Introductionmentioning

confidence: 99%

High‐speed sub‐threshold operation of carbon nanotube interconnects

Sathyakam¹,

Mallick²,

Saxena³

2019

IET Circuits, Devices & Systems

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Sub-threshold voltage operated circuits are the future for ultra-low-power applications. These circuits are inherently slow due to the very small sub-threshold currents. Here, the authors propose two approaches for improving the speed of SWCNT bundle interconnects driven by CNTFET-based circuits under sub-threshold conditions. First, the authors modulate the channel length of the CNTFETs that are used in the driver circuits to increase sub-threshold output current. The output current is maximum when the channel length is optimised to 15 nm. Second, the authors design driver circuits made of CNTFET-based inverters and transmission gates for SWCNT bundle interconnects at sub-threshold voltages. The authors consider five different configurations of the driver and load circuits. SPICE simulations show that transmission gates play a vital role in driver circuits by reducing the propagation delay and increasing the switching speed at high frequencies. Finally, the authors perform temperature-dependent analysis of the best cases from the proposed circuits and show that the propagation delay and power dissipated by them increases drastically at increased temperatures up to 500 K. 2 CNTFET current model CNTFET is regarded as the most advanced device which has similarities of MOSFET but has an advantage of working in

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Demonstration of a Subthreshold FPGA Using Monolithically Integrated Graphene Interconnects

Cited by 18 publications

References 31 publications

3D integrated monolayer graphene–Si CMOS RF gas sensor platform

3D integrated monolayer graphene–Si CMOS RF gas sensor platform

Capacitance scaling based energy efficient FIR filter for digital signal processing

High‐speed sub‐threshold operation of carbon nanotube interconnects

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