DC Modeling and Geometry Scaling of SiC Low-Voltage MOSFETs for Integrated Circuit Design

Ahmed, Shamim; Rashid, Arman Ur; Hossain, Maksudul; Vrotsos, Tom; Francis, A. Matthew; Mantooth, H. Alan

doi:10.1109/jestpe.2019.2925955

Cited by 11 publications

(10 citation statements)

References 21 publications

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“…Once the design has been completed, numerical simulations have been performed in the Cadence Virtuoso environment [ 21 ] by using a Verilog-A BSIM MOSFETs model [ 22 ] whose parameters are opportunely tuned to fit the experimental curves of the 4H-SiC MOSFETs in the temperature range from 298 K to 573 K. The model has been developed by Fraunhofer IISB, and a more detailed description of the 4H-SiC MOSFETs is reported in Appendix A .…”

Section: Numerical Simulation Results and Process Variabilitymentioning

confidence: 99%

A 4H-SiC CMOS Oscillator-Based Temperature Sensor Operating from 298 K up to 573 K

Rinaldi,

Liguori,

May

et al. 2023

Sensors

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In this paper, we propose a temperature sensor based on a 4H-SiC CMOS oscillator circuit and that is able to operate in the temperature range between 298 K and 573 K. The circuit is developed on Fraunhofer IISB’s 2 μm 4H-SiC CMOS technology and is designed for a bias voltage of 20 V and an oscillation frequency of 90 kHz at room temperature. The possibility to relate the absolute temperature with the oscillation frequency is due to the temperature dependency of the threshold voltage and of the channel mobility of the transistors. An analytical model of the frequency-temperature dependency has been developed and is used as a starting point for the design of the circuit. Once the circuit has been designed, numerical simulations are performed with the Verilog-A BSIM4SiC model, which has been opportunely tuned on Fraunhofer IISB’s 2 μm 4H-SiC CMOS technology, and their results showed almost linear frequency-temperature characteristics with a coefficient of determination that was higher than 0.9681 for all of the bias conditions, whose maximum is 0.9992 at a VDD = 12.5 V. Moreover, we considered the effects of the fabrication process through a Monte Carlo analysis, where we varied the threshold voltage and the channel mobility with different values of the Gaussian distribution variance. For example, at VDD = 20 V, a deviation of 17.4% from the nominal characteristic is obtained for a Gaussian distribution variance of 20%. Finally, we applied the one-point calibration procedure, and temperature errors of +8.8 K and −5.8 K were observed at VDD = 15 V.

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Section: Numerical Simulation Results and Process Variabilitymentioning

confidence: 99%

A 4H-SiC CMOS Oscillator-Based Temperature Sensor Operating from 298 K up to 573 K

Rinaldi,

Liguori,

May

et al. 2023

Sensors

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“…Noticeable discrepancies exist at the transition between the triode and the saturation regions for the LV NMOS. The differences are caused by the trapped charges at the 4H-SiC/SiO2 interface that soften the triode-to-saturation transition [7]. The effect is not well modeled in the level 3 SPICE model since the models were originally developed for Si technology, where the interface state density is significantly lower than the stateof-the-art SiC technology.…”

Section: On Improving the Model Accuracymentioning

confidence: 99%

“…Ahmed and his colleagues have developed BSIM4 (level 54) models with modified equations that describe the effects of the trapped interface charges on SiC MOSFET characteristics [7]. With the added equations, the modeling accuracy of the triode-to-saturation transition and the body-bias-dependent transconductance of SiC CMOS devices are significantly improved.…”

Section: On Improving the Model Accuracymentioning

confidence: 99%

“…SiC IC research began in the 1990s, where the early studies were conducted on both 6H-SiC and 4H-SiC wafers with lowvoltage (LV) all n-type MOSFET (NMOS) processes [4]- [6]. With material and process improvement, Raytheon Systems Limited (RSL) developed a 1.2-µm 4H-SiC complementary-MOS (CMOS) process (HiTSiC) along with its process design kit (PDK) [7]. Since then, a variety of SiC CMOS circuits have been demonstrated with the HiTSiC process [3], [8]- [13].…”

Section: Introductionmentioning

confidence: 99%

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SPICE Modeling and Circuit Demonstration of a SiC Power IC Technology

Liu

Zhang

Isukapati

et al. 2022

IEEE J. Electron Devices Soc.

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Silicon carbide (SiC) power integrated circuit (IC) technology allows monolithic integration of 600 V lateral SiC power MOSFETs and low-voltage SiC CMOS devices. It enables application-specific SiC ICs with high power output and work under harsh (high-temperature and radioactive) environments compared to Si power ICs. This work presents the device characteristics, SPICE modeling, and SiC CMOS circuit demonstrations of the first two lots of the proposed SiC power IC technology. Level 3 SPICE models are created for the high-voltage lateral power MOSFETs and low-voltage CMOS devices. SiC ICs, such as the SiC CMOS inverter and ring oscillator, have been designed, packaged, and characterized. Proper operations of the circuits are demonstrated. The effects of the trapped interface charges on the characteristics of SiC MOSFETs and SiC ICs are also discussed.

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“…The UA group has developed several versions of leading edge models for SiC MOSFETs in this process. The most recent version captures the behavior of nchannel and p-channel SiC MOSFETs up to 300 C (16). It is a geometry and temperature scalable compact model based on BSIM4v7 and is known as BSIM4SIC.…”

Section: Semiconductor Device Modelsmentioning

confidence: 99%

(Invited) Wide Bandgap Analog and Mixed-Signal IC Design for Advanced Power Electronics

Mantooth

2017

ECS Trans.

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Economy and performance are benefits that come with high power density power electronics, just as in the case of VLSI electronics. High density power electronics require the heterogeneous integration of disparate technologies including power semiconductor devices, driver, protection and control circuitry, passives and voltage isolation techniques into single modules. Such integration activity was central to the Google Little Box Challenge competition conducted last year. One of the keys to advancing power electronic integration has been the commercial reality of wide bandgap power semiconductor devices made from silicon carbide and gallium nitride. The ability to design and manufacture wide bandgap integrated circuits as drivers, controllers, and protection circuitry allows them to be packaged in close proximity to the power device die to minimize parasitics that would adversely impact system performance. These impacts include excessive ringing, noise generation, power loss, and, potentially, self-destruction. This talk will describe the state of the art in wide bandgap analog and mixed-signal IC design including example circuits such as amplifiers, data converters, controllers, and protection circuits and their integration into power electronic platforms. A synthesis tool under development for heterogeneous power circuit layout will be briefly described as a capstone to the application space descriptions.

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DC Modeling and Geometry Scaling of SiC Low-Voltage MOSFETs for Integrated Circuit Design

Cited by 11 publications

References 21 publications

A 4H-SiC CMOS Oscillator-Based Temperature Sensor Operating from 298 K up to 573 K

A 4H-SiC CMOS Oscillator-Based Temperature Sensor Operating from 298 K up to 573 K

SPICE Modeling and Circuit Demonstration of a SiC Power IC Technology

(Invited) Wide Bandgap Analog and Mixed-Signal IC Design for Advanced Power Electronics

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