2008 IEEE International Symposium on Circuits and Systems (ISCAS) 2008
DOI: 10.1109/iscas.2008.4542124
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Curse of digital polar transmission: Precise delay alignment in amplitude and phase modulation paths

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Cited by 12 publications
(5 citation statements)
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“…The results presented in [11] confirm this and also specifically demonstrate the sensitivity of the polar architecture to the timing alignment of the phase and amplitude paths, an alignment that becomes more demanding and problematic in wider bandwidth systems.…”
Section: ) Fully Digital Polar Transmittersupporting
confidence: 74%
“…The results presented in [11] confirm this and also specifically demonstrate the sensitivity of the polar architecture to the timing alignment of the phase and amplitude paths, an alignment that becomes more demanding and problematic in wider bandwidth systems.…”
Section: ) Fully Digital Polar Transmittersupporting
confidence: 74%
“…The level of the out-of-band spectrum is significantly below the mask given by the 3GPP for the used carrier frequency and bandwidth combination [1]. Consequently, there is much room for additional out-of-band degradations like nonideal components [20] or AM and PM mismatch [30]. However, the investigated effect scales with bandwidth to carrier frequency and poses a fundamental limitation that needs to be considered in scenarios where the ratio becomes smaller.…”
Section: B Compensation By Shifting the Edge Locationsmentioning
confidence: 99%
“…Several studies on the spectral degradation of a polar transmitter have already been published. Apart from investigations that focus on limitations like amplitude modulation (AM) and phase modulation (PM) mismatch [30], nonlinearities [20] or circuit noise, there are similar papers investigating principal limitations for polar-like systems. In [13] and [14] an outphasing transmitter is described and limitations and corrections are proposed regarding both phase components.…”
Section: Introductionmentioning
confidence: 99%
“…In the phase modulator, a delay mismatch between lowpass and high-pass path is caused by digital and analog blocks [12]. The digital delay mismatch is mainly due to different signal processing latencies in the two paths, as seen in Fig.…”
Section: A Delay Calibrationmentioning
confidence: 99%