Cost-Effective Integrated RF Power Transistor in 0.18-$muhboxm$CMOS Technology

Yan, Tao; Liao, Huailin; Xiong, Yong Zhong; Zeng, Rong; Shi, Jinglin; Huang, Ru

doi:10.1109/led.2006.882568

Cited by 25 publications

(7 citation statements)

References 9 publications

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“…However, optimal performance (breakdown voltage, on-resistance, parasitics) will not be achieved in this way. Examples of LDMOS in CMOS foundry processes can be found in [104]- [109]. A number of CMOS foundries are today offering LDMOS or EDMOS devices into their RF-CMOS processes, but detailed information is sparse or confidential.…”

Section: High-breakdown Devices In Standard Cmos Processesmentioning

confidence: 99%

A Review of Watt-Level CMOS RF Power Amplifiers

Johansson

Fritzin

2014

IEEE Trans. Microwave Theory Techn.

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Abstract-This paper reviews the design of watt-level integrated CMOS RF power amplifiers (PAs) and state-of-the-art results in the literature. To reach watt-level output power from a single-chip CMOS PA, two main strategies can be identified: use of high supply voltage, and use of matching and power combination. High supply voltage limits are closely related to device design in the fabrication process. However, the maximum operating voltage can be improved by amplifier class selection, circuit solutions, and process modifications or mask changes. High output power can also be reached by the use of on-chip matching and power combination, commonly using on-chip transformers. Reliability often sets the limits for the PA design, and PA degradation mechanisms are reviewed. A compilation of state-of-the-art published results for linear and switched wattlevel PAs, as well as a few fully integrated CMOS PAs, is presented and discussed.

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Section: High-breakdown Devices In Standard Cmos Processesmentioning

confidence: 99%

A Review of Watt-Level CMOS RF Power Amplifiers

Johansson

Fritzin

2014

IEEE Trans. Microwave Theory Techn.

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“…Owing to the increase in the popularity of integrated circuit (IC) technology, there has been a constant thrust towards the integration of power transistors such as drain-extended metal-oxide-semiconductor (DeMOS) along with standard complementary MOS (CMOS) devices for compact design, low cost, and high voltage/high power performance. These devices are required in the voltage range of 20V-100V for smart power applications, for example, display drivers, dc-dc converters, automotive, and high-voltage telecommunication [1]- [5]. DeMOS transistors, as shown in Figure 1(a), use the reduced surface field (RESURF) concept, where the surface electric field is optimized by charge compensation between the lightly doped N-type drift region and the P-well and Psubstrate regions [6].…”

Section: Introductionmentioning

confidence: 99%

Investigating the Correlation Between Space Charge Modulation and ON-State Breakdown in Multiple RESURF DeMOS Devices

Mishra¹,

Gupta

2022

IEEE Access

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In this work, the ON-state performance of the drain-extended metal-oxide-semiconductor (DeMOS) device with multiple RESURF junctions in the drift region is explored. Although the additional RESURF implant offers a significant improvement in the breakdown voltage (VBD) and ON-resistance (RON) compared to the conventional DeMOS, it induces an early space charge modulation (SCM) initiated quasi-saturation (QS) effects and adversely impacts the ON-state breakdown of the device. Moreover, these devices are compared for a fixed breakdown voltage where a correlation between their analog/RF performance and QS effects is established. This work also presents and validates the design guideline for multiple RESURF devices that can alleviate the SCM/QS effects by 8% and improve the ON-state breakdown voltage by 35% compared to the standard device, thereby maximizing the ON-state performance of the device without compromising the OFF-state breakdown.INDEX TERMS Drain extended MOS (DeMOS), double RESURF, triple RESURF, space charge modulation (SCM), quasi-saturation (QS), ON-state breakdown.

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“…Recently, complementary metal-oxide-semiconductor (CMOS) technology which integrates logic circuit, radio frequency (RF) circuit and power switch on the same chip require the power devices with reduction of specific onresistance (R on,sp ), improvement of breakdown voltage (BV) and current driving capability. The development of suitable power devices using CMOS is necessary to achieve its goal for system on chip (SOC) realization, [1][2][3][4][5][6][7][8][9][10][11] particularly in the low voltage range such as 30 V rating for RF wireless system, display driver, and DC-DC converter applications. [12][13][14][15][16][17][24][25][26][27][28] Laterally diffused metal oxide semiconductor (LDMOS) with double reduced surface field (RESURF) technology using low thickness of epitaxial layer or n-well implant has utilized for designing high-voltage devices with a low R on,sp .…”

Section: Introductionmentioning

confidence: 99%

A Novel Cost Effective Double Reduced Surface Field Laterally Diffused Metal Oxide Semiconductor Design for Improving Off-State Breakdown Voltage

Han

Chen

Chang

et al. 2012

Jpn. J. Appl. Phys.

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The multi-layer metals of Ni/AuGe/Pt/Au with a Pt diffusion barrier layer of ohmic contact to n-GaAs were studied. The surface morphology and ohmic contact resistivity of multi-layer metals were characterized, with and without the Pt diffusion barrier layer for comparison. The SEM and EDS measurements show the Pt diffusion barrier layer can block the interdiffusion of atoms in multi-layer metals, and improve the surface morphology. The TLM results show that the samples with a Pt diffusion barrier layer have uniform ohmic contact resistance, indicating that the Pt diffusion barrier layer can increase the repetition and uniformity of ohmic contact to n-GaAs, and improve the thermal stability and reliability of GaAs-based devices.

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Cost-Effective Integrated RF Power Transistor in 0.18-$muhboxm$CMOS Technology

Cited by 25 publications

References 9 publications

A Review of Watt-Level CMOS RF Power Amplifiers

A Review of Watt-Level CMOS RF Power Amplifiers

Investigating the Correlation Between Space Charge Modulation and ON-State Breakdown in Multiple RESURF DeMOS Devices

A Novel Cost Effective Double Reduced Surface Field Laterally Diffused Metal Oxide Semiconductor Design for Improving Off-State Breakdown Voltage

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