2011
DOI: 10.1016/j.sse.2011.01.018
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Control of topography and morphology for channel SiGe by in-situ HCl etching for future CMOS technologies with high-K metal gate

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Cited by 4 publications
(2 citation statements)
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“…refer also to Ref. [11]). After processing a 70nm epitaxial Silicon-Germanium layer (Ge=26±1%) with 4.5 (±0.5) ×10 19 cm -3 Boron co-doping is obtained.…”
Section: Methodsmentioning
confidence: 89%
“…refer also to Ref. [11]). After processing a 70nm epitaxial Silicon-Germanium layer (Ge=26±1%) with 4.5 (±0.5) ×10 19 cm -3 Boron co-doping is obtained.…”
Section: Methodsmentioning
confidence: 89%
“…An in-situ etching of Si before SiGe deposition (recessed SiGe channel) as reported by Loo et al [10,11] avoids additional topography by SiGe channels for the PFET resulting in a clear benefit for the gate-first integration of high-k metal gate [12]. For the batch tool an in-situ etching process was developed achieving the same morphology to that of a single wafer tool with flat topography (Fig.…”
Section: Effect Of the Wafer Backsidementioning
confidence: 99%