Continuity in the development of ultra shallow junctions for 130-45 nm CMOS: the tool and annealing methods

Kuznetsov, Victor P.; Zutphen, A.J.M.M. Van; Kerp, H.; Vermont, P.; Pagès, Xavier Llimona i; Hapert, J.J. van; Jeugd, K. van der; Granneman, E. H. A.

doi:10.1109/rtp.2003.1249125

Cited by 3 publications

(1 citation statement)

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“…P OSTSPIKE annealing methods, such as flash-lamp annealing [1]- [3], solid-phase regrowth [4], and laser annealing (LA) [5], are currently being actively investigated for the scaling of source and drain (S/D) junction depth and MOSFET performance improvements. In terms of LA, laser spike annealing (LSA), which is milli-to microseconds annealing realized with continuous wave (CW) laser irradiation and very fast stage scanning, was recently reported to be promising for the 45-nm node [6].…”

Section: Introductionmentioning

confidence: 99%

Merits of heat assist for melt laser annealing

Shibahara

Eto

Kurobe

2006

IEEE Trans. Electron Devices

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In this paper, the potential for sub-10-nm junction formation of partial-melt laser annealing (PMLA), which is a combination of solid-phase regrowth and heat-assisted laser annealing (HALA), is demonstrated. HALA and PMLA are effective for reducing laser-energy density for dopant activation and for improving heating uniformity of device structure. The absence of melting at the dopant profile tail for PMLA results in a negligibly small diffusion at this region. A high activation rate is achievable by melting the upper part of the amorphous-silicon layer. The obtained sheet resistance of 10-nm-deep junctions was about 700 Ω/sq. for both n + /p and p + /n junctions. These results imply that PMLA is applicable for much shallower junction formation.

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