Combined low-frequency noise and random telegraph signal analysis of silicon MOSFET's

Simoen, Eddy; Magnusson, Ulf; Claeys, Cor

doi:10.1016/0169-4332(93)90108-n

Cited by 13 publications

(4 citation statements)

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“…physical location and energy state etc) can be figured out [15]. Therefore, RTN analysis has been reported as a diagnostic tool for interpreting and quantifying the trap sites [16][17][18][19]. However, there have been just a few studies on RTN affected by various process conditions in NW FETs.…”

Section: Introductionmentioning

confidence: 99%

Reduction of random telegraph noise by high-pressure deuterium annealing for p-type omega-gate nanowire FET

et al. 2020

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In this work, we studied the effect of high-pressure deuterium annealing (HPDA) on a p-type omega-gate nanowire field effect transistor by random telegraph noise (RTN) signal analysis. After HPDA under conditions of 400 • C and 10 atm for 30 min, I OFF decreases by 41.2% and I ON increases by up to 5.4%. Also, subthreshold swing (SS) is reduced from 72 mV dec −1 to 70 mV dec −1 . In RTN analysis, multi-level RTN is reduced to single-level RTN due to the passivation of a fast trap site by HPDA. ∆I D /I D is also decreased 1.3 and 1.1 times at |V OV | = 0.2 V and 0.4 V, respectively. From the low-frequency noise analysis, the reduction of trap density is observed by 86% at |V OV | = 0.4 V after HPDA. Through these results, we found that the HPDA reduces traps of gate dielectric and improves the quality of the interface between gate dielectric and NW channel in p-type OGNW FET.

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Section: Introductionmentioning

confidence: 99%

Reduction of random telegraph noise by high-pressure deuterium annealing for p-type omega-gate nanowire FET

et al. 2020

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“…8 The rather large difference in minimum and maximum g m values is explained by the fact that regular ͑isolated͒ MOSFETs are compared with EL ones, which have typically a larger average g m and a lower noise level. 10 This clearly indicates the role of the transistor edge regions, which are believed to be more defective. [12][13][14] For the EL devices, the spread in noise is due to the difference in gate-oxidation conditions, the low-temperature oxidation yielding the lowest noise.…”

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confidence: 95%

“…The noise measurements have been performed as described previously. [9][10][11] Here, data are reported in linear operation, corresponding to a drain voltage V DS ϭ50 mV, at a drain current I D ϭ1 A ͑V GS ϾV T ͒ and at I D ϭ10 nA ͑weak inversion͒. Also data obtained in saturation, in the prekink region ͑I D ϭ50 A; V DS ϭ1 V͒ are shown.…”

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confidence: 97%

“…The n-MOSFETs have a nominal area of WϫLϭ20 mϫ1 m, with a ⌬Lϭ0.23 m. The average threshold voltage V T ϭ1.17 V. Both closed geometry, edgeless ͑EL͒ and local oxidization of silicon ͑LOCOS͒ or MESA-LOCOS isolated transistors have been characterized. 9,10 In addition, two gate-oxidation conditions have been studied: a low-temperature ͑850°C͒ oxidation and a high-temperature oxidation ͑975°C͒. In this way, the experimental matrix is extended over a wider region, since the effective width of the EL devices is about four times the width of the conventional transistors.…”

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confidence: 99%

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Empirical relationship between the low-frequency noise spectral density and the transconductance of silicon-on-insulator n-channel metal-oxide-semiconductor transistors

Simoen

Claeys

1994

Applied Physics Letters

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Articles you may be interested inMobility comparison between front and back channels in ultrathin silicon-on-insulator metal-oxide-semiconductor field-effect transistors by the front-gate split capacitance-voltage method Appl. Phys. Lett. 89, 032104 (2006); 10.1063/1.2222255Low-frequency noise overshoot in ultrathin gate oxide silicon-on-insulator metal-oxide-semiconductor field-effect transistors Appl.Origin of transconductance oscillations in silicon-on-insulator metal-oxide-semiconductor field-effect transistors with an ultrathin 6-nm-thick active Si layer Transconductance oscillations in metal-oxide-semiconductor field-effect transistors with thin silicon-on-insulator originated by quantized energy levels Lowfrequency noise behavior of γirradiated partially depleted silicononinsulator nchannel metaloxide semiconductor transistors

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Noise as a diagnostic and prediction tool in reliability physics

Jevtic¹

1995

Microelectronics Reliability

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Combined low-frequency noise and random telegraph signal analysis of silicon MOSFET's

Cited by 13 publications

References 21 publications

Reduction of random telegraph noise by high-pressure deuterium annealing for p-type omega-gate nanowire FET

Reduction of random telegraph noise by high-pressure deuterium annealing for p-type omega-gate nanowire FET

Empirical relationship between the low-frequency noise spectral density and the transconductance of silicon-on-insulator n-channel metal-oxide-semiconductor transistors

Noise as a diagnostic and prediction tool in reliability physics

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