Chip Scale 12-Channel 10 Gb/s Optical Transmitter and Receiver Subassemblies Based on Wet Etched Silicon Interposer

Abstract

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Optics in Computing: From Photonic Network-on-Chip to Chip-to-Chip Interconnects and Disintegrated Architectures

“…Both schemes can yield a high number of directly interconnected highperformance cores, unleashing solutions that cannot be met by electronics. At the same time, this approach is fully inline with the 2.5D integration scheme that employs discrete photonic and electronic chips on the same silicon interposer and has made tremendous progress in the recent years [113]- [116]. 2.5D integration can offer tight electronic-photonic cointegration on the same interposer, significantly reducing the electronic link distances and the associated energy consumption.…”

Wet-Etched Three-Level Silicon Interposer for 3-D Embedding and Connecting of Optoelectronic Dies and CMOS ICs

“…Firstly, the assembly concept will be described. Compared with the 2.5D silicon interposer platform [16], the resulting sub-module is 50% smaller. Secondly, thermal transfer is simulated for 3D module and 2.5D module.…”

Silicon Interposer Based QSFP-DD Transceiver Demonstrator with >10 Gbps/mm2Bandwidth Density

“…Comparing with wire bonding for electrical interconnects, flip chip bonding can be used to connect with the designed circuitry, and the resulting assembly can be much more compact, achieving near chip size package. Besides, flip chip bonding features improved RF performance, with low reflections and losses [3].…”

“…Silicon interposer with one layer electrical interface and low cost optical TSVs has been developed for a chip scale transceiver demonstration, which will definitely enable the step-forward into cost-effective transceiver submodules [3]. Recently, we have demonstrated the high potential of the 2D assembling scheme by using a single optical interface, working at 10 Gb/s [6].…”