Chip-Integrated Voltage Sources for Control of Trapped Ions

Abstract

Trapped-ion quantum information processors offer many advantages for achieving high-fidelity operations on a large number of qubits, but current experiments require bulky external equipment for classical and quantum control of many ions. We demonstrate the cryogenic operation of an iontrap that incorporates monolithically-integrated high-voltage CMOS electronics (±8 V full swing) to generate surface-electrode control potentials without the need for external, analog voltage sources. A serial bus programs an array of 16 digital-to-analog converters (DACs) within a single chip that apply voltages to segmented electrodes on the chip to control ion motion. Additionally, we present the incorporation of an integrated circuit that uses an analog switch to reduce voltage noise on trap electrodes due to the integrated amplifiers by over 50 dB. We verify the function of our integrated electronics by performing diagnostics with trapped ions and find noise and speed performance similar to those we observe using external control elements. II. HIGH-VOLTAGE DIGITAL-TO-ANALOG CONVERTER DESIGNVoltages are derived from an R-2R resistor ladder digital-to-analog converter (DAC) [16] with 12-bits of resolution and an output range of approximately ±8 V (see Fig. 1). The DAC accepts a 12-bit code word that it translates to an analog voltage on its output (see example data in Fig. 1e). We program the DACs using an integrated serial peripheral interface (SPI) bus, controlled by arXiv:1810.07152v1 [quant-ph]

Microwaves in Quantum Computing

“…However, these lines draw zero or minimal current and do not require high bandwidth (< 1 MHz is generally ample), so they can be made from very thin, low-thermal-conductivity wires. Research into generating these voltages with DACs fabricated in the trap substrate itself is being pursued by some groups [ 149 ].…”

Engineering of microfabricated ion traps and integration of advanced on-chip features

“…Whilst not integrated on chip, the attachment methods are similar to those used by industry on silicon dies, hence, dies could be integrated on an ion trap if required. Using methods available at modern CMOS facilities [32] and careful calibration, one could realistically fabricate resistive temperature probes in the trap. Conversely, a resistive strip could also act as a local heater for use in cryogenic systems to prevent gas molecules freezing out on the trap during cool down [100].…”

“…In analogy to Rent's rule [166], it was suggested that for quantum computation, the scaling of interconnections and control lines with the number of qubits would become a major bottleneck [167]. This connectivity problem naturally lead to the introduction of active components into the vacuum system [33], or even into the ion trap [32]. One of the key requirements for ion trapping is that all integrated components must be UHV compatible [168].…”

“…In addition to the miniaturisation of ion traps, the integration of peripheral components, such as photodetectors [31] and digital to analogue converters (DACs) [32], into the ion trap is also of great interest because it allows the creation of compact devices and stand-alone trap modules and has also the potential to reduce electrical noise [33]. The integration of peripheral components is also critical to large scale quantum computing with trapped ions where stand-alone modules are a key ingredient to scalability [18], [19].…”

Large‐Scale Fabrication of Surface Ion Traps on a 300 mm Glass Wafer

“…Silicon, as the standard foundry substrate, has been developed as mature surface trap substrate since 2010. [ 18 ] Many electrical and optical components, e.g., trench capacitor, [ 19 ] digital‐to‐analog converter (DACs), [ 20 ] waveguide, [ 21 ] grating coupler, [ 21 ] and photon detectors, [ 22 ] have been monolithically integrated into Si traps. However, standard Si substrates have high RF loss tangent, which need proper RF shielding design [ 18,19,23 ] and a thick layer of dielectric (up to 10 μm) as insulator to achieve a low trap capacitance.…”