Charging damage in thin gate-oxides-better or worse?

A comparison of plasma-induced damage on the reliability between high-k/metal-gate and SiO2/poly-gate complementary metal oxide semiconductor technology

“…as the plasma processing changes [16]. During plasma processing, dielectric breakdown occurs at plasma current density of approximately 2-20 A/cm 2 [17]. Thus, the experiments in this study assume that the P value is approximately 2 Â 10 À10 A with 1 lm 2 transistors size (i.e., for the damaged structures with antenna ratio AR = 100Â, I plasma = 2 A/cm 2 , and for structure with AR = 1000Â, I plasma = 20 A/cm 2 ).…”

Plasma-Induced Damage on the Reliability of Hf-Based High-k/Dual Metal-Gates Complementary Metal Oxide Semiconductor Technology

“…The P value is assumed to be a constant under a given plasma processing and is expected to exhibit a process dependence due to changes in ion density, electron temperature, and so forth, as the plasma processing changes [17]. During plasma processing, dielectric breakdown occurs at plasma current density of approximately 2-20 A/cm 2 [18]. Thus, the experiments in this study assume that the P value is approximately 2 × 10 −10 A with 1 μm 2 transistors size (i.e., for the damaged structures with antenna ratio AR = 100X, I plasma = 2 A/cm 2 , and for structure with AR = 1000X, I plasma = 20 A/cm 2 ).…”

Test Pattern Design for Plasma Induced Damage on Inter-Metal Dielectric in FinFET Cu BEOL Processes

“…With increased number of metal layers in the complex wiring systems, it is hard to avoid discharging path through inter metal dielectric film during process-induced charging. With the introduction of low-k material in BEOL processes [6,7], alleviated worsen RC delay issues, the isolation films can be more susceptible to charging stresses [8,9]. The damages resulting from plasma charging-induced stresses on compact interconnect structures responsible for realizing the intricate BEOL wirings can greatly affect the yield and reliability of advanced CMOS ICs.…”