Characterization of sputtered TiO2 gate dielectric on aluminum oxynitride passivated p-GaAs

Abstract

Structural and electrical characteristics of sputtered TiO2 gate dielectric on p-GaAs substrates have been investigated. It has been demonstrated that the introduction of thin aluminum oxynitride (AlON) layer between TiO2 and p-GaAs improves the interface quality. X-ray photoelectron spectroscopy and transmission electron microscopy results show that the AlON layer effectively suppresses the interfacial oxide formation during thermal treatment. The effective dielectric constant value is 1.5 times higher for the TiO2∕AlON gate stack compared to directly deposited TiO2 on p-GaAs substrates, with a comparable interface state density. The capacitance-voltage (C-V), current-voltage (I-V) characteristics, and charge trapping behavior of the TiO2∕AlON gate stack under constant voltage stressing exhibit an excellent interface quality and high dielectric reliability, making the films suitable for GaAs based complementary metal-oxide-semiconductor technology.

Studies on Al/ZrO2/GaAs metal-oxide-semiconductor capacitors and determination of its electrical parameters in the frequency range of 10 kHz–1 MHz

“…The interface trap density ͑D it ͒ was calculated with the help of C-V and G-V characteristics using Hill's method. 25 The values of D it were found to be 0.75ϫ 10 12 , 1.3ϫ 10 12 , and 2.4 ϫ 10 12 cm −2 eV −1 for oxide thicknesses of 25, 40, and 50 nm, respectively. As the dielectric layer thickness increases, more and more strain is developed at the interface, leading to higher interface trap density.…”

Electrical properties of GaAs metal–oxide–semiconductor structure comprising Al2O3 gate oxide and AlN passivation layer fabricated in situ using a metal–organic vapor deposition/atomic layer deposition hybrid system

“…[20][21][22][23][24][25][26][27][28][29][30][31][32][33][34][35][36][37][38] Forming an AlN or AlO x N y layer is advantageous because of its relatively wide band gap and high dielectric constant. 33 Various techniques have been used to form such layers on III-V semiconductors at low processing temperatures, including radio frequency sputtering, [22][23][24][25] thermal- 26 and plasma-enhanced [27][28][29] ALD, cyclic exposure of nitrogen plasma and trimethylaluminum (TMA), [30][31][32] and metal-organic vapor deposition (MOCVD). [33][34][35][36][37] Recently, we reported the use of MOCVD, as a high throughput and cost-effective process, to achieve AlN passivation in situ prior to ALD-based Al 2 O 3 gate oxide formation.…”

Effect of atomic layer deposition growth temperature on the interfacial characteristics of HfO2/p-GaAs metal-oxide-semiconductor capacitors

“…24 Furthermore, the hysteresis voltage (V H ), an important parameter to measure the hysteresis effect in MOS capacitors, 25,26 is determined by sweeping the gate voltage from accumulation to inversion and then sweeping back to obtain the difference of the flat-band voltage. 27 The value of V H is 307 mV for 300 C, 553 mV for 250 C, and 573 mV for 200 C, respectively. The reduced hysteresis may come from the improved trapping behaviour of the dielectric and better interface quality 28…”