2013
DOI: 10.1017/s143192761300679x
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Characterization of 3D Dopant Distribution in State of the Art FinFET Structures

Abstract: Extended abstract of a paper presented at Microscopy and Microanalysis 2013 in Indianapolis, Indiana, USA, August 4 – August 8, 2013.

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Cited by 4 publications
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“…The tolerance in fin width has been calculated to about 1 nm for industry acceptable variability in electrical parameters for 20 nm finFETs and a tolerance of 10–15% for variations in gate length (Shiying & Bokor, 2003). Further, diffusion of dopants into the Si channel can cause large changes in the electronic density, known as random density fluctuations; these are an important part of current experimental and computational studies (Pei et al, 2002; Bernstein et al, 2006; Baravelli et al, 2008; Wang et al, 2011). A failed device could hence differ from a working device based on small structural or concentration fluctuations.…”
Section: Discussionmentioning
confidence: 99%
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“…The tolerance in fin width has been calculated to about 1 nm for industry acceptable variability in electrical parameters for 20 nm finFETs and a tolerance of 10–15% for variations in gate length (Shiying & Bokor, 2003). Further, diffusion of dopants into the Si channel can cause large changes in the electronic density, known as random density fluctuations; these are an important part of current experimental and computational studies (Pei et al, 2002; Bernstein et al, 2006; Baravelli et al, 2008; Wang et al, 2011). A failed device could hence differ from a working device based on small structural or concentration fluctuations.…”
Section: Discussionmentioning
confidence: 99%
“…Very recently, correlative microscopy with APT and transmission electron microscopy (TEM) on 30 nm static random access memory (SRAM) planar transistors with Ni-Si contacts has also been shown (Panciera et al, 2013). Boron profiles for 14 nm fins were reported by Hatzistergos et al (2013) albeit on samples specifically prepared for APT.…”
Section: Introductionmentioning
confidence: 99%
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“…Their atom probe results clearly showed the silicide contacts, polysilicon gates, and TiN capping. In the same year, Hatzistergos et al [205] from IBM reported on APT of 14 nm FinFET devices, albeit without any site specificity. They reasoned that the small size of the transistor, which followed a repeated array in two dimensions, would ensure that any tip contained at least one transistor.…”
Section: Atomic-scale Dopant Distribution In Semiconductor Devicesmentioning
confidence: 99%