2001
DOI: 10.1080/10584580108012881
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Characteristics of Pt/SBT/ZrO2/Si structure for metal ferroelectric insulator semiconductor field effect transistor applications

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Cited by 4 publications
(2 citation statements)
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“…Although these studies address static NC behaviour, time dependence still plays an important role because capacitance measurements are usually carried out using AC methods and are further complicated by the dynamic effects of charge trapping, leakage and fre quency dispersion of the dielectric response, which are typical for these materials [60][61][62] . The physical interpreta tion of capacitance enhancements commonly observed in ferroelectric-dielectric heterostructures [63][64][65][66][67] is often not straightforward, and care must be taken to rule out various artefacts, such as conductivityinduced Maxwell-Wagner effects 68,69 . Nevertheless, these studies provide strong evidence for a capacitance boost caused by the NC effect.…”
Section: Proof Of Concept the First Connection Between Experi Ments mentioning
confidence: 99%
“…Although these studies address static NC behaviour, time dependence still plays an important role because capacitance measurements are usually carried out using AC methods and are further complicated by the dynamic effects of charge trapping, leakage and fre quency dispersion of the dielectric response, which are typical for these materials [60][61][62] . The physical interpreta tion of capacitance enhancements commonly observed in ferroelectric-dielectric heterostructures [63][64][65][66][67] is often not straightforward, and care must be taken to rule out various artefacts, such as conductivityinduced Maxwell-Wagner effects 68,69 . Nevertheless, these studies provide strong evidence for a capacitance boost caused by the NC effect.…”
Section: Proof Of Concept the First Connection Between Experi Ments mentioning
confidence: 99%
“…Moreover, because the voltage drop across the unwanted interfacial oxide layer is very high, the input voltage required to operate ferroelectric films in read and write mode increases. In order to solve these problems, the metalferroelectric-insulator-silicon (MFIS) structure was proposed with a buffer layer of high dielectric constant, such as that offered by CeO 2 [3][4][5]. The buffer layer should have a low lattice mismatch, a low leakage current, and a low interface state density.…”
Section: Introductionmentioning
confidence: 99%