Characteristics and Programming of Floating-Gate pFET Switches in an FPAA Crossbar Network

Gray, J.; Twigg, C.M.; Abramson, David; Hasler, P.

doi:10.1109/iscas.2005.1464626

Cited by 25 publications

(16 citation statements)

References 9 publications

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“…Finally in routing r3 they are placed into different columns leading the longest distance between them. Note that in current FPAA technologies, total delay in a path is dominated by the switch parasitics rather than the wire length, therefore connections made to a different column suffers the most degradation [5]. As seen from Figure 2, our simulation results follow the actual measurements closely with some minor errors.…”

Section: Measurement Resultssupporting

confidence: 58%

Rapid Prototyping of Large-scale Analog Circuits With Field Programmable Analog Array

D'Alberto

Milder

Sandryhaila

et al. 2007

15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2007)

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Abstract-Modern advances in reconfigurable analog technologies are allowing field-programmable analog arrays (FPAAs) to dramatically grow in size, flexibility, and usefulness. This paper presents rapid prototyping results of a bandpass filter as a sample analog circuit using our floatinggate based large-scale FPAA. A major source of parasitics introduced during the circuit mapping process is interconnect switches used for routing. Our goal is to obtain models of the mapped circuits that can be simulated using SPICE in order to observe the impact of interconnect parasitics on the relevant analog metrics. Our results indicate that the mapped analog circuits obtain desired responses even with interconnect parasitics, clearly demonstrating the practicality of our FPAA.

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Section: Measurement Resultssupporting

confidence: 58%

Rapid Prototyping of Large-scale Analog Circuits With Field Programmable Analog Array

D'Alberto

Milder

Sandryhaila

et al. 2007

15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2007)

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“…When programmed to the "on" state, the floating gate pFET switch exhibits a resistance around the same levels as the transmission gate for the entire signal range. However, the floating gate pFET switch contributes less parasitic capacitance to the signal line than the transmission gate, which translates to higher possible bandwidths [5].…”

Section: Floating Gate Transistor Switchesmentioning

confidence: 99%

Programmable Conductance Switches for FPAAs

Twigg

Hasler

2007

2007 IEEE International Symposium on Circuits and Systems (ISCAS)

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Floating gate transistors make excellent switches for large-scale field-programmable analog arrays (FPAAs). In addition to simple "on" and "off" connections, they can be used as computational elements within synthesized circuits. However, the programmable range of these computational elements as well as the quality of an "on" switch can be limited by the particular switch topology and programming methods. To extend the useful range of floating gate switches, programming method improvements and indirectly programmed topologies are explored and demonstrated. I. FPAA SWITCHESSwitches are one of the most important components of reconfigurable systems. In field-programmable analog arrays (FPAAs), they generally are the limiting factor in device bandwidth, and therefore many researchers have attempted to improve upon basic switch designs through various means. Interconnections have been made using fuses, antifuses [1], and even parallel G M cells [2] that use active components as computational elements and interconnects. However, all of these interconnect strategies involve simple "on" or "off" connections between components.In addition to good "on" switches, the floating gate interconnects in large-scale FPAAs [3] can be used as computational elements within the synthesized circuits by programming them between "off" and "on" states. Normally switches are computationally useless and consume a significant amount of the reconfigurable device area, especially when considering the memory elements used to control them. Using floating gate switches as programmable conductances can increase the computational utilization of the reconfigurable device area by implementing current sources, voltage references, and even larger circuits such as diffusors and multipliers within the switch fabric. Common floating gate transistor arrays and their associated programming methods [4] can limit the range and effectiveness of computational switch elements. However, modifications to these methods and topologies can significantly reduce these limitations. II. FLOATING GATE TRANSISTOR SWITCHESThe floating gate switch is simply a pFET with capacitive gate coupling, as shown in Fig. 1. A double poly capacitor is used to couple a control voltage, V C , to the floating gate, and a MOS capacitor is used as a tunneling junction. With no DC path to a fixed potential, charge can be stored on the floating node. The current flowing through the floating gate pFET is then controlled by the voltages coupled onto the floating gate and the amount of charge stored on the floating node. ByFig. 1. Floating gate pFET layout. 0 0.5 1 1.5 2 10 −10 10 −9 10 −8 10 −7 10 −6 10 −5 10 −4 V C (V) I D (A) "on" s witch "off" switch inject tunnel + -A V C + -V DD Fig. 2. Injection and tunneling of floating gate transistors.modifying this charge, the transistor can be programmed over a wide range of values for a given set of terminal voltages.Fowler-Nordheim tunneling is used as a global erase for the array of floating gate pFET switches, which can be viewed as an increase ...

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“…In the recent years, also the field programmable analog arrays based on the tunable (programmable) OTAs 886 S. SZCZEPANSKI, B. PANKIEWICZ AND S. KOZIEL and integrating capacitors (C) have been developed successfully to built reconfigurable hardware platforms (e.g. for CT analog filter rapid-prototyping) [12][13][14][15][16][17][18].…”

Section: Introductionmentioning

confidence: 99%

Programmable feedforward linearized CMOS OTA for fully differential continuous‐time filter design

Szczepański

Pankiewicz

Koziel

2009

Circuit Theory & Apps

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SUMMARYIn this paper, a feedforward linearization method for programmable CMOS operational transconductance amplifier (OTA) is described. The proposed circuit technique is developed using simple source-coupled differential pair transconductors, a feedback-loop amplifier for self-adjusting transcoductance (g m ) and a linear reference resistor (R). As a result, an efficient linearization of a transfer characteristic of the OTA is obtained. SPICE simulations show that for 0.35 m AMS CMOS process with a single +3 V power supply, total harmonic distortion at 1 V pp and temperature range from −30 to +90 • C is less than −49.3 dB in comparison with −35.8 dB without linearization. Moreover, the input voltage range of linear operation is increased. Power consumption of the linearized OTA circuit is 0.86 mW. Finally, the OTA is used to design a third-order elliptic low-pass filter in high-frequency range. The cut-off frequency of the operational transconductance amplifier-capacitor (OTA-C) filter is tunable in the range of 322.6 kHz-10 MHz using the feedforward linearized OTAs with the digitally programmable current mirrors.

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Characteristics and Programming of Floating-Gate pFET Switches in an FPAA Crossbar Network

Cited by 25 publications

References 9 publications

Rapid Prototyping of Large-scale Analog Circuits With Field Programmable Analog Array

Rapid Prototyping of Large-scale Analog Circuits With Field Programmable Analog Array

Programmable Conductance Switches for FPAAs

Programmable feedforward linearized CMOS OTA for fully differential continuous‐time filter design

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