Abstract-A programmable high-frequency operational transconductance amplifier (OTA) is proposed and analyzed. A general configurable analog block (CAB) is presented, which consists of the proposed programmable OTA, programmable capacitor and MOSFET switches. Using the CABs, the universal tunable and field programmable analog array (FPAA) can be constructed, which can realize many signal-processing functions, including filters. A tuning circuit is also discussed. The proposed OTA has been simulated and fabricated in CMOS technology. The results show that the OTA has the transconductance tunable/programmable in a wide range of 700 times and the 3-dB bandwidth larger than 20 MHz. A universal 5 8 CAB array has been fabricated. The chip has also been configured to realize OTA-C 60-kHz and 500-kHz bandpass filters based on ladder simulation and biquad cascade.Index Terms-CMOS analog integrated circuits, continuous time filters, field programmable analog circuits, programmable circuits, programmable filters.

In this study, the authors discuss a robust and efficient technique for rapid design of compact couplers. The approach exploits two-level space mapping (SM) correction of an equivalent circuit model of the coupler structure under design. The first SM layer (local correction) is utilised to ensure good matching between the equivalent circuit and the electromagnetic model at the component level. Subsequent global correction allows for accounting the electromagnetic couplings between the components. The important advantage of two-level model correction is that small number of parameter is utilised at each stage, which substantially simplifies and speeds up the parameters extraction procedure. Another advantage is that the local-global SM results in considerably better generalisation capability of the surrogate model (as compared to conventional SM). This leads to improved reliability of the optimisation process and its reduced computational cost. The proposed technique is validated using an example of two compact microstrip rat-race couplers and compared with other surrogate-based optimisation techniques.

This paper presents an algorithm for the measurement of the human heart rate, using photoplethysmography (PPG), i.e., the detection of the light at the skin surface. The signal from the PPG sensor is processed in time-domain; the peaks in the preprocessed and conditioned PPG waveform are detected by using a peak detection algorithm to find the heart rate in real time. Apart from the PPG sensor, the accelerometer is also used to detect body movement and to indicate the moments in time, for which the PPG waveform can be unreliable. This paper describes in detail the signal conditioning path and the modified algorithm, and it also gives an example of implementation in a resource-constrained wrist-wearable device. The algorithm was evaluated by using the publicly available PPG-DaLia dataset containing samples collected during real-life activities with a PPG sensor and accelerometer and with an ECG signal as ground truth. The quality of the results is comparable to the other algorithms from the literature, while the required hardware resources are lower, which can be significant for wearable applications.

The application of a Bluetooth skin resistance sensor in assisting people with Autism Spectrum Disorders (ASD), in their day-to-day work, is presented in this paper. The design and construction of the device are discussed. The authors have considered the best placement of the sensor, on the body, to gain the most accurate readings of user stress levels, under various conditions. Trial tests were performed on a group of sixteen people to verify the correct functioning of the device. Resistance levels were compared to those from the reference system. The placement of the sensor has also been determined, based on wearer convenience. With the Bluetooth Low Energy block, users can be notified immediately about their abnormal stress levels via a smartphone application. This can help people with ASD, and those who work with them, to facilitate stress control and make necessary adjustments to their work environment.

In this article, a reliable and low-cost design methodology for simulation-driven optimization of miniaturized rat-race couplers (RRCs) is presented. We exploit a two-stage design approach, where a composite structure (a basic building block of the RRC structure) is first optimized using a pattern search algorithm, and, subsequently, the entire coupler is tuned by means of surrogate-based optimization (SBO) procedure. SBO is executed with the underlying low-fidelity model implemented as cascaded response surface approximations (RSAs) of the composite structure. Full-wave analysis of the entire coupler is required at the tuning stage only. By combining SBO with coupler decomposition and RSA surrogates, the overall cost of the design process corresponds (in terms of CPU time) to less than three electromagnetic simulations of the compact RRC, and results in highly miniaturized structure (82% footprint reduction compared to conventional coupler) that exhibits perfect return loss and isolation (almost 260 dB at the operating frequency), as well as a strong harmonic and spurious suppression (below 220 dB) in, approximately, 3-9.5 GHz frequency band.

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This paper describes the FPGA-based hardware implementation of an algorithm for an automatic traffic surveillance sensor network. The aim of the algorithm is to extract moving vehicles from real-time camera images for the evaluation of traffic parameters, such as the number of vehicles, their direction of movement and their approximate speed, using low power hardware of a sensor network node. A single, stationary, monochrome camera is used, mounted at a location high above the road. Occlusions are not detected, however simple shadow and highlight elimination is performed. The algorithm is designed for frame-rate efficiency and is specially suited for pipelined hardware implementation. The authors, apart from the careful selection of particular steps of the algorithm and the modifications towards parallel implementation, also proposed novel improvements such as backgrounds' binary mask combination or non-linear functions in highlight detection, resulting in increasing the robustness and efficiency of hardware realization. The algorithm has been implemented in FPGA and tested on real-time video streams from an outdoor camera.

SUMMARYIn this paper, a feedforward linearization method for programmable CMOS operational transconductance amplifier (OTA) is described. The proposed circuit technique is developed using simple source-coupled differential pair transconductors, a feedback-loop amplifier for self-adjusting transcoductance (g m ) and a linear reference resistor (R). As a result, an efficient linearization of a transfer characteristic of the OTA is obtained. SPICE simulations show that for 0.35 m AMS CMOS process with a single +3 V power supply, total harmonic distortion at 1 V pp and temperature range from −30 to +90 • C is less than −49.3 dB in comparison with −35.8 dB without linearization. Moreover, the input voltage range of linear operation is increased. Power consumption of the linearized OTA circuit is 0.86 mW. Finally, the OTA is used to design a third-order elliptic low-pass filter in high-frequency range. The cut-off frequency of the operational transconductance amplifier-capacitor (OTA-C) filter is tunable in the range of 322.6 kHz-10 MHz using the feedforward linearized OTAs with the digitally programmable current mirrors.