2017
DOI: 10.1021/acsami.6b15862
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Carrier-Number-Fluctuation Induced Ultralow 1/f Noise Level in Top-Gated Graphene Field Effect Transistor

Abstract: A top-gated graphene FET with an ultralow 1/f noise level of 1.8 × 10 μmHz (f = 10 Hz) has been fabricated. The noise has the least value at Dirac point, it then increases fast when the current deviates from that at Dirac point, the noise slightly decreases at large current. The phenomenon can be understood by the carrier-number-fluctuation induced low frequency noise, which caused by the trapping-detrapping processes of the carriers. Further analysis suggests that the effect trap density depends on the locati… Show more

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Cited by 25 publications
(31 citation statements)
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“…Hence, a certain carrier variation in channel can shift the Fermi level of graphene much more significantly near the Dirac point. [ 7,36,45 ] As discussed previously, the epoxide functional group induced by the TMA/O 3 ALD deposition process can generate the trap sites at the interface between the graphene and top‐gate dielectric layer. Similar to the conventional semiconductor, the interface traps with the energy level over Dirac point of graphene are believed to the acceptors, while interface traps with energy level below the Dirac point are donors.…”
Section: Figurementioning
confidence: 99%
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“…Hence, a certain carrier variation in channel can shift the Fermi level of graphene much more significantly near the Dirac point. [ 7,36,45 ] As discussed previously, the epoxide functional group induced by the TMA/O 3 ALD deposition process can generate the trap sites at the interface between the graphene and top‐gate dielectric layer. Similar to the conventional semiconductor, the interface traps with the energy level over Dirac point of graphene are believed to the acceptors, while interface traps with energy level below the Dirac point are donors.…”
Section: Figurementioning
confidence: 99%
“…According to the former studies, less oxygen atoms are available during the ALD deposition of Al 2 O 3 layer. [34][35][36] Hence, due to the deficiency of the oxygen atoms in Al 2 O 3 layer, more positive charges are accumulated and dope the graphene into opposite polarity. In addition, the epoxide functional group at graphene surface induced by the TMA/O 3 ALD deposition process can act as the interface trap sites.…”
Section: Modulating the Electronic Property Of Graphene By Doping Is mentioning
confidence: 99%
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“…Figure 5a shows the drain current hysteresis behavior for the 7, 9, and 11 µm channel length GFETs at V DS = 0.1 V. The gate bias was swept from −60 to 60 V followed by 60 to −60 V, respectively. [37] Figure 5b shows the drain current hysteresis recorded for another 11 µm channel length GFET under gate bias sweeping rates (dV BG /dt) of 0.1, 1, and 10 V s −1 . [36] However, the Dirac point on the left-hand side of transfer curve seems to be not affected in the hysteresis measurement, indicating that the interfacial trap effect is not obvious in the channel region of the GFETs.…”
Section: Wwwadvelectronicmatdementioning
confidence: 99%
“…However, the Dirac point on the left‐hand side of transfer curve seems to be not affected in the hysteresis measurement, indicating that the interfacial trap effect is not obvious in the channel region of the GFETs. This smaller Dirac point shift indicates that the lower density of trap sites in the channel region, which can be attributed to the elimination of oxygen/water‐related molecules around graphene induced by the oxidation process of Al seed layer . Figure b shows the drain current hysteresis recorded for another 11 µm channel length GFET under gate bias sweeping rates (d V BG /d t ) of 0.1, 1, and 10 V s −1 .…”
mentioning
confidence: 99%