Building trusted ICs using split fabrication

Vaidyanathan, Kaushik; Das, Bishnu Prasad; Sumbul, H. Ekin; Liu, Renzhi; Pileggi, Larry

doi:10.1109/hst.2014.6855559

Cited by 88 publications

(42 citation statements)

References 4 publications

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“…are used for detection [13][14][15][16][17][18][19] [26], increasing side-channel activity caused by Trojans [27] and run-time monitoring [28] have been proposed. On the other hand, in order to make Trojan insertion difficult, researchers have proposed techniques such as logic obfuscation to lock the functionality of the IC [29][30][31], functional filler cell insertion [32] for layout protection, IC camouflaging [33] and split-manufacturing [34,35] to prevent reverse-engineering of the design. These design-for-trust techniques can potentially help to detect and prevent highly stealthy Trojans that can otherwise evade pre and post-silicon detection techniques, albeit at the cost of area, power and timing overhead.…”

Section: Detection Techniquesmentioning

confidence: 99%

Benchmarking of Hardware Trojans and Maliciously Affected Circuits

et al. 2017

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Research in the field of hardware Trojans has seen significant growth in the past decade. However, standard benchmarks to evaluate hardware Trojans and their detection are lacking. To this end, we have developed a suite of Trojans and 'trust benchmarks' (i.e., benchmark circuits with a hardware Trojan inserted in them) that can be used by researchers in the community to compare and contrast various Trojan detection techniques. In this paper, we present a comprehensive vulnerability analysis flow at various levels of abstraction of digital-design, that has been utilized to create these trust benchmarks. Further, we present a detailed evaluation of our benchmarks in terms of metrics such as Trojan detectability, and in the context of different attack

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Section: Detection Techniquesmentioning

confidence: 99%

Benchmarking of Hardware Trojans and Maliciously Affected Circuits

et al. 2017

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“…Design for trust is mainly associated with creating IC designs with runtime monitoring [58], supportive test points, sensors, and obfuscation [59], within the design which facilitates Trojan detection or prevents Trojan insertion accordingly. Split manufacturing is another technique which aims at building a trusted flow of fabrication process by dividing it into two parts [60], [61]: front end of the line (FEOL) and back end of the line (BEOL) fabrication. An untrusted foundry performing FEOL does not have access to the layers in BEOL and is unable to find the proper part of the IC to insert the Trojan.…”

Section: Digital Hardware Trojansmentioning

confidence: 99%

Challenges and Opportunities in Analog and Mixed Signal (AMS) Integrated Circuit (IC) Security

et al. 2017

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In the last decade and so, a large amount of research has been done to secure hardware. Security features such as physically unclonable function (PUF), hardware metering, and obfuscation have been developed to protect hardware from threats. Detection and avoidance techniques for IC counterfeiting and hardware Trojan have been introduced to protect the IC supply chain. Till now, research has focused on digital ICs, but analog and mixed signal (AMS) ICs which hold the highest share in the market have been neglected. The solutions developed in digital domain for digital ICs do not extend well to AMS ICs. Thus, a major portion of the IC market remains unsecured. In this paper, we described the challenges and limitations associated with AMS IC security research focusing on three major sections: AMS-enabled security, counterfeiting, and AMS hardware Trojans. We also express a vision for AMS security research.

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“…A comparison is given in Table IX. 1. Split-Manufacturing: A split at the first metal layer (or very low metal layers) can prevent an untrusted foundry from reverse-engineering a design since most interconnects are missing [46][47]. However, split manufacturing does not provide Trojan detection by itself.…”

Section: B Tpad Vs Other Techniquesmentioning

confidence: 99%

TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits

Ganesan

et al. 2016

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Abstract-There are increasing concerns about possible malicious modifications of integrated circuits (ICs) used in critical applications. Such attacks are often referred to as hardware Trojans. While many techniques focus on hardware Trojan detection during IC testing, it is still possible for attacks to go undetected. Using a combination of new design techniques and new memory technologies, we present a new approach that detects a wide variety of hardware Trojans during IC testing and also during system operation in the field. Our approach can also prevent a wide variety of attacks during synthesis, place-and-route, and fabrication of ICs. It can be applied to any digital system, and can be tuned for both traditional and split-manufacturing methods. We demonstrate its applicability for both ASICs and FPGAs. Using fabricated test chips with Trojan emulation capabilities and also using simulations, we demonstrate: 1. The area and power costs of our approach can range between 7.4-165% and 0.07-60%, respectively, depending on the design and the attacks targeted; 2. The speed impact can be minimal (close to 0%); 3. Our approach can detect 99.998% of Trojans (emulated using test chips) that do not require detailed knowledge of the design being attacked; 4. Our approach can prevent 99.98% of specific attacks (simulated) that utilize detailed knowledge of the design being attacked (e.g., through reverse-engineering). 5. Our approach never produces any false positives, i.e., it does not report attacks when the IC operates correctly. I. INTRODUCTION HERE is growing concern about the trustworthiness of integrated circuits (ICs). If an untrusted party fabricates an IC, there is potential for an adversary to insert a malicious hardware Trojan [1], an unauthorized modification of the IC resulting in incorrect functionality and/or sensitive data being exposed [2]. These include (but are not limited to) [3]: a) Modification of functional behavior through logic changes: Index TermsFor example, extra logic gates may be inserted to force an incorrect logic value on a wire at some (arbitrary) point in time (Fig. 1a) [2]. b) Electrical modification: For example, extra capacitive loading may be placed on a circuit path to alter timing characteristics of the IC (Fig. 1b) [2]. c) Reliability degradation: For example, aging of transistors (e.g., Negative Bias Temperature Instability (NBTI)) may be accelerated, degrading reliability ( Fig. 1c) [4]. A hardware Trojan is detected when we report malicious modifications to an IC. A hardware Trojan is prevented when Manuscript received January 9, 2015; revised May 8, 2015; accepted July 20, 2015. Work supported by IARPA Trusted Integrated Chips (TIC) Program. All authors are with Dept. of Electrical Engineering, Stanford University, Stanford, CA 94305 USA (e-mail: tonyfwu@stanford.edu). S. Mitra is also with Dept. of Computer Science, Stanford University.we stop a hardware Trojan from being inserted. Part of the challenge in detecting or preventing hardware Trojans arises from the fact that...

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Building trusted ICs using split fabrication

Cited by 88 publications

References 4 publications

Benchmarking of Hardware Trojans and Maliciously Affected Circuits

Benchmarking of Hardware Trojans and Maliciously Affected Circuits

Challenges and Opportunities in Analog and Mixed Signal (AMS) Integrated Circuit (IC) Security

TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits

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