Bright-Field AAPSM Conflict Detection and Correction

Abstract

As feature sizes shrink, it will be necessary to use AAPSM (Alternating-Aperture Phase Shift Masking) to image critical features, especially on the polysilicon layer. This imposes additional constraints on the layouts beyond traditional design rules. Of particular note is the requirement that all critical features be flanked by opposite-phase shifters, while the obey minimum width and spacing requirements. A layout is called phase-assignable if it satisfies this requirement. If a layout is not phase-assignable, the phase conflicts have to be removed to enable the use of AAPSM for the layout. Previous has sought to detect a suitable set of phase Conflicts to be removed, as well as correct them 5,6, The contributions of this paper are the following: (1) a new approach to detect a minimal set of phase conflicts (also referred to as AAPSM conflicts), which when corrected will produce a phaseassignable layout; (2) a layout modification scheme for correcting these AAPSM conflicts. The proposed approach for conflict detection shows significant improvements in the quality of results and runtime for real industrial circuits, when compared to previous methods. To the best of our knowledge, this is the first time layout modification results are presented for bright-field AAPSM. Our experiments show that the percentage area increase for making a layout phase-assignable ranges from

WIPAL: Window-based parallel layout decomposition in double patterning lithography

“…Pattern splitting with introduced stitches is a major factor distinguishing between the strong alternating phase-shift mask (AltPSM) and the DP layout decomposition problems [23]. Formally, the DP layout decomposition and coloring problem is as follows: Given a layout and a distance t, find a pattern splitting and color assignment solution for all the layout patterns such that the total cost is minimized, subject to the constraint that non-overlapping shapes within distance t be assigned different colors.…”

Layout Decomposition Approaches for Double Patterning Lithography

“…Our ILPbased color assignment is performed on the conflict graph to find the coloring solution that minimizes a weighted sum of the number of coloring conflicts, 4 cuts, design rule violations and overlap lengths. Besides the ILP-based coloring algorithm, phase conflict detection [9] and node-deletion bipartization [10] methods could conceivably be adopted with better runtime efficiency but possibly degraded solution quality [2].…”

“…The testcases are placed with row utilizations of 70% and 90% using Cadence SoC Encounter (v07.10) [5]. 9 Table I shows key parameters of the testcases, where testcases of 90 nm designs are suffixed by "90" and 45 nm designs are suffixed by "45." In the 45 nm layouts, minimum spacing between features is 70 nm and minimum feature size is 50 nm.…”

“…This recalls strong alternating phase-shift mask (AltPSM) coloring issues and automatic phase conflict detection and resolution methods [9]. DPL layout decomposition must satisfy the following requirement: two features must be assigned opposite colors (corresponding to mask exposures) if their spacing is less than the minimum coloring spacing.…”

Lithography and design in partnership: a new roadmap

“…This recalls strong Alt-PSM (Alternating-Phase Shift Mask) coloring issues and automatic phase conflict detection and resolution methods [7]. DPL layout decomposition must satisfy the following requirement: two features must be assigned opposite colors (corresponding to mask exposures) if their spacing is less than the minimum coloring spacing.…”