Boron penetration in p+ polycrystalline-Si/Al2O3/Si metal–oxide–semiconductor system

Park, Dae-Gyu; Cho, Heung-Jae; Yeo, In‐Seok; Roh, Jae–Sung; Hwang, Jeong-Mo

doi:10.1063/1.1315346

Cited by 46 publications

(20 citation statements)

References 8 publications

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“…However, only very few metals can satisfy these requirements and furthermore, when a metal is in contact with the high-k layer, its Fermi-level will tend to be at the neutral level of the high-k layer. This phenomenon is called Fermi-level pinning (FLP) which causes EWF of the nMOS (pMOS) to be much greater (smaller) than the corresponding work function in vacuum [8]. The electron density in the metal gate can also influence the EWF [9].…”

Section: Interface Dipole Formation In Mos Stackmentioning

confidence: 99%

Interface dipole engineering in metal gate/high-k stacks

et al. 2012

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Although metal gate/high-k stacks are commonly used in metal-oxide-semiconductor field-effect-transistors (MOSFETs) in the 45 nm technology node and beyond, there are still many challenges to be solved. Among the various technologies to tackle these problems, interface dipole engineering (IDE) is an effective method to improve the performance, particularly, modulating the effective work function (EWF) of metal gates. Because of the different electronegativity of the various atoms in the interfacial layer, a dipole layer with an electric filed can be formed altering the band alignment in the MOS stack. This paper reviews the interface dipole formation induced by different elements, recent progresses in metal gate/high-k MOS stacks with IDE on EWF modulation, and mechanism of IDE. high-k dielectrics, metal gate, interface dipole, MOS stack, effective work function Citation:Huang A P, Zheng X H, Xiao Z S, et al. Interface dipole engineering in metal gate/high-k stacks. Chin Sci Bull, 2012, 57: 28722878, doi: 10.1007/s11434-012-5289-6As poly-Si/SiO 2 is replaced by metal gate/high-k stacks in the 45 nm MOS technological node and beyond, the interface becomes more complicated and there are still many challenges to be solved [1,2], such as the flatband voltage shift (V fb shift) [3]. Hence, the properties of the high-k layer must be reconsidered carefully. It has recently been reported that the interface dipole can induce potential difference across the interface and change the band alignment of the MOS stack, and this phenomenon can be exploited to modulate the V fb shift [4][5][6]. Elemental doping can also improve the performance of the high-k layer. Interface dipole engineering (IDE) by varying the dopants or inserting capping layers has attracted much attention in MOS technology. Not only can this technique control the V fb shift, but also the properties of the high-k dielectrics can be improved [7]. This paper reviews the formation of interface dipole, recent research progresses on IDE and effective work function (EWF) modulation, as well as mechanism of IDE in metal gate/high-k MOS stacks. Interface dipole formation in MOS stackTo control the threshold voltage (V th ), work function of a metal gate should be near the conduction band of Si (~4.3 eV) for nMOS and valence band (~5.2 eV) for pMOS. However, only very few metals can satisfy these requirements and furthermore, when a metal is in contact with the high-k layer, its Fermi-level will tend to be at the neutral level of the high-k layer. This phenomenon is called Fermi-level pinning (FLP) which causes EWF of the nMOS (pMOS) to be much greater (smaller) than the corresponding work function in vacuum [8]. The electron density in the metal gate can also influence the EWF [9]. Stacked metal layers used in the gate structure have been investigated. Misra et al. [10] reported that a metal gate stack using Ru-Ta alloys could yield a work function compatible with nMOS. Lin et al. [11] implanted N into a Mo gate that was

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Section: Interface Dipole Formation In Mos Stackmentioning

confidence: 99%

Interface dipole engineering in metal gate/high-k stacks

et al. 2012

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“…However, impurity penetration phenomena such as boron diffusion, which is problematic for poly/high-k gate stack, are hardly suppressed in HfAlO system [115] because of the limited impurity diffusion barrier characteristics of Al 2 O 3 [116]. Moreover, phase separation between HfO 2 and Al 2 O 3 accompanied by HfO 2 crystallization occurs as in the case of HfSiO, when HfO 2 content is large relative to Al 2 O 3 [111] and this partial crystallization may cause the inhomogeneity and the enlargement of the leakage current through HfAlO after the high-temperature annealing [117].…”

Section: Hafnium-aluminum-based Gate Dielectricsmentioning

confidence: 99%

Hafnium-Based Gate Dielectric Materials

Nishiyama

2013

High Permittivity Gate Dielectric Materials

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In this chapter, we focus on hafnium-based gate dielectrics. HfO 2 is regarded as the most promising material for the high-k gate dielectrics owing to its large dielectric constant and large band-gap energy. In the first part of this chapter, these characteristics are addressed in a comparison with SiO 2 and other high-k materials. Thermal stability is a major issue for the application of high-k materials to MOSFETs in LSIs. Although HfO 2 satisfies this requirement, severer process conditions may cause problems even with this material. Suppression of these issues is also addressed in the second part of this chapter. In order to enhance the characteristics of HfO 2 , transformation of the monoclinic phase to the tetragonal and the cubic phases with larger dielectric constant has been pursued recently. We mention the issue in the last part of this chapter. Introductory Remarks and Brief Outline of the ChapterSince the proposal of the materials in the early 2000s [1-3], hafnium-based gate dielectrics have been regarded as the most promising materials for the application to large scale integrations (LSIs). In 2007, Intel announced the start of manufacturing of 45 nm-node LSIs with high-k/metal gate stack, with the remark that the world's first high-k material in commercial production was hafnium-based [4].There are several characteristics that the high-k materials should meet for the application to metal oxide semiconductor field effect transistors (MOSFETs) in LSIs. First, we clarify the properties so that readers can understand their A. Nishiyama

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“…7 While the pseudobinary alloys meet many of the requirements for the gate dielectric implementation, 1 the carrier mobility degradation and the degradation of transistor performance due to crystallization and metal penetration into the underlying channel is a major concern. 7-9 The incorporation of nitrogen into the high-dielectric film or at the high-dielectric interface with the Si substrate could be advantageous and has been found to be effective in suppressing crystallization, 10 decreasing dopant penetration into bulk silicon, 11 inhibiting interfacial reaction with the Si substrate, 11,12 and improving the electrical performance of the device. 13,14 In this letter, we have evaluated the effect of nitrogen incorporation on the thermal stability of sputter deposited lanthanum aluminate ͑LaAlO͒ dielectric 15-20 on a Si ͑100͒ substrate, before and after a 1000°C, 10 s N 2 RTA.…”

mentioning

confidence: 99%

Effect of nitrogen incorporation on the thermal stability of sputter deposited lanthanum aluminate dielectrics on Si (100)

Sivasubramani

Kim

et al. 2006

Applied Physics Letters

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The thermal stability of sputter deposited LaAlOx and lanthanum aluminum oxynitride (LaAlON) dielectrics on top of Si (100) was evaluated after 1000°C rapid thermal annealing (RTA). A nitrogen concentration of ∼3at.% in the bulk LaAlON film was found to suppress crystallization as well as metal (lanthanum and aluminum) outdiffusion into the Si (100) substrate after the RTA treatment. These results suggest that film microstructure should be carefully controlled to inhibit impurity diffusion in the conventional gate stack fabrication process.

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Boron penetration in p+ polycrystalline-Si/Al2O3/Si metal–oxide–semiconductor system

Cited by 46 publications

References 8 publications

Interface dipole engineering in metal gate/high-k stacks

Interface dipole engineering in metal gate/high-k stacks

Hafnium-Based Gate Dielectric Materials

Effect of nitrogen incorporation on the thermal stability of sputter deposited lanthanum aluminate dielectrics on Si (100)

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