Interface dipole engineering in metal gate/high-k stacks

Abstract

Although metal gate/high-k stacks are commonly used in metal-oxide-semiconductor field-effect-transistors (MOSFETs) in the 45 nm technology node and beyond, there are still many challenges to be solved. Among the various technologies to tackle these problems, interface dipole engineering (IDE) is an effective method to improve the performance, particularly, modulating the effective work function (EWF) of metal gates. Because of the different electronegativity of the various atoms in the interfacial layer, a dipole layer with an electric filed can be formed altering the band alignment in the MOS stack. This paper reviews the interface dipole formation induced by different elements, recent progresses in metal gate/high-k MOS stacks with IDE on EWF modulation, and mechanism of IDE. high-k dielectrics, metal gate, interface dipole, MOS stack, effective work function Citation:Huang A P, Zheng X H, Xiao Z S, et al. Interface dipole engineering in metal gate/high-k stacks. Chin Sci Bull, 2012, 57: 28722878, doi: 10.1007/s11434-012-5289-6As poly-Si/SiO 2 is replaced by metal gate/high-k stacks in the 45 nm MOS technological node and beyond, the interface becomes more complicated and there are still many challenges to be solved [1,2], such as the flatband voltage shift (V fb shift) [3]. Hence, the properties of the high-k layer must be reconsidered carefully. It has recently been reported that the interface dipole can induce potential difference across the interface and change the band alignment of the MOS stack, and this phenomenon can be exploited to modulate the V fb shift [4][5][6]. Elemental doping can also improve the performance of the high-k layer. Interface dipole engineering (IDE) by varying the dopants or inserting capping layers has attracted much attention in MOS technology. Not only can this technique control the V fb shift, but also the properties of the high-k dielectrics can be improved [7]. This paper reviews the formation of interface dipole, recent research progresses on IDE and effective work function (EWF) modulation, as well as mechanism of IDE in metal gate/high-k MOS stacks. Interface dipole formation in MOS stackTo control the threshold voltage (V th ), work function of a metal gate should be near the conduction band of Si (~4.3 eV) for nMOS and valence band (~5.2 eV) for pMOS. However, only very few metals can satisfy these requirements and furthermore, when a metal is in contact with the high-k layer, its Fermi-level will tend to be at the neutral level of the high-k layer. This phenomenon is called Fermi-level pinning (FLP) which causes EWF of the nMOS (pMOS) to be much greater (smaller) than the corresponding work function in vacuum [8]. The electron density in the metal gate can also influence the EWF [9]. Stacked metal layers used in the gate structure have been investigated. Misra et al. [10] reported that a metal gate stack using Ru-Ta alloys could yield a work function compatible with nMOS. Lin et al. [11] implanted N into a Mo gate that was

Effect of interface dipole on channel engineering and on direct tunneling current in double gate MOSFET

“…Such a structure creates electric dipoles at the interface because of which there is change in flat band voltage (V FB ) of MOS device. [18][19][20] The experimental observations in the literature have confirmed the existence of interface dipoles, corroborating the interface dipole effect. 21 In this work, I G for 10 nm gate length DG NMOSFET using Channel Engineering that is, (a) Si and (b) In 0.53 Ga 0.47 As as channel material is studied and simulation results are reported using Silvaco ATLAS 3D TCAD.…”

Characterization of Al Incorporation into HfO2 Dielectric by Atomic Layer Deposition

“…Also, in highly HfO 2 rich samples (samples D, E, F, I) there is some hump in the weak inversion region, which depicts a high number of interface state traps [27]. In addition, it is also apparent from the figure that the flat band voltage shifted in the positive direction after incorporation of Al due to the addition of negatively charged dipoles [28].…”

Influence of nanostructure formation on the crystal structure and morphology of epitaxially grown Gd2O3 on Si(001)

“…REOs reveal polymorphism, where for example the dielectric properties of the polymorphic structures differ (Edge et al, 2008). Regarding the electrical application, the crystal structure and orientation can influence the properties of the rare-earth oxide/silicon interface, for example by formation of interface dipoles, which could improve the performance of MOS structures significantly (Huang et al, 2012). Since the crystal structure of REOs depends on the manufacturing conditions (Foë x & Traverse, 1966), it is useful to investigate how the manufacturing parameters influence the structural and morphological properties of rare-earth oxides.…”