Bias temperature reliability of n/sup +/ and p/sup +/ polysilicon gated NMOSFETs and PMOSFETs

Abadeer, W.; Tonti, W.; Hansch, W.; Schwalke, Udo

doi:10.1109/relphy.1993.283289

Cited by 10 publications

(3 citation statements)

References 4 publications

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“…5 between NMOS and PMOS at V at elevated temperature K. According to the generation of donor-like [8], we observed identical power-law time dependencies with an exponent for both N-and P-MOS independently of the vertical field polarity. The NBTI result exhibits the same in NMOS and PMOS, and reaches roughly eV cm .…”

Section: Interface Traps Generation Versus Oxide Charge Under N-ansupporting

confidence: 54%

Interface Trap Generation and Hole Trapping Under NBTI and PBTI in Advanced CMOS Technology With a 2-nm Gate Oxide

Denais

Huard

Parthasarathy

et al. 2004

IEEE Trans. Device Mater. Relib.

110

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This paper gives an insight into the degradation mechanisms during negative and positive bias temperature instabilities in advanced CMOS technology with a 2-nm gate oxide. We focus on generated interface traps and oxide traps to distinguish their dependencies and effects on usual transistor parameters. negative bias temperature instability (NBTI) and positive bias temperature instability in both NMOS and PMOS have been compared and a possible explanation for all configurations has been suggested. Recovery and temperature effect under NBTI were also investigated showing different behaviors of the two components.Index Terms-CMOS, interface traps, negative bias temperature instability (NBTI), NMOS, oxide traps, positive bias temperature instability (PBTI), PMOS, recovery, reliability, threshold voltage.

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Section: Interface Traps Generation Versus Oxide Charge Under N-ansupporting

confidence: 54%

Interface Trap Generation and Hole Trapping Under NBTI and PBTI in Advanced CMOS Technology With a 2-nm Gate Oxide

Denais

Huard

Parthasarathy

et al. 2004

IEEE Trans. Device Mater. Relib.

110

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show abstract

“…And t d is also effected by the aging degradation. Several aging mechanisms can greatly affect reliability during the lifetime of an IC, including negative bias temperature instability (NBTI) [38,39] and hot carrier injection (HCI) [40]. Both NBTI and HCI increase the threshold voltage (V th ) and the t d .…”

Section: ) Tp T Ro Impacted By Ic Process Variationmentioning

confidence: 99%

A Novel Authentication Methodology to Detect Counterfeit PCB Using PCB Trace-Based Ring Oscillator

Zhang

Ren

2021

IEEE Access

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The existence of counterfeit products, e.g., integrated circuits (ICs) and printed circuit boards (PCBs), in the modern semiconductor supply chain has seriously jeopardized the security and reliability of electronic systems, and has also caused the loss of suppliers' profit and reputation. Most of existing research papers prevent or detect counterfeit IC and PCB substrate separately, without testing the PCB as a whole, and often require the assistance of external equipment. In this paper, a novel ring oscillatorbased PCB authentication (ROPA) methodology to detect counterfeit PCB through supply chain is proposed, which utilizes PCB trace-based ring oscillators (PTRO) assisted by on-chip ring oscillators, and a novel PCB signature extraction methodology. By switching the PCB to different load modes, the signature can reflect the process variations in PCB traces and overall impedance. The ROPA can provide both IC and PCB authentication independently of external equipments, and allows remote authentication for the user. The ROPA structure has shown advantageous area (0.301% on average) and power (0.355% on average) overhead when implemented on a number of benchmarks. Then the ROPA is implemented on a set of authentic and counterfeit FPGA development boards to verify the effectiveness on counterfeit detection. The results show that the proposed method provides 96.7% confidence in detecting tampered PCBs and 100% confidence in detecting overproduced, recycled, and cloned PCBs.

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“…These mechanisms include bias temperature instability (BTI), hot carrier injection (HCI), and oxide breakdown. Among the BTIs, as interface traps are more often to happen in PMOS transistors, negative bias temperature instability (NBTI) affecting PMOS is a more dominating aging effect compared to positive bias temperature instability (PBTI) affecting NMOS [1]. Both NBTI and PBTI increase the threshold voltage and degrade the speed of CMOS transistors.…”

Section: Introductionmentioning

confidence: 99%

Radic: A standard-cell-based sensor for on-chip aging and flip-flop metastability measurements

Wang¹,

Tran²,

George³

et al. 2012

2012 IEEE International Test Conference

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As process technology further scales, aging, noise and variations in integrated circuits (ICs) and systems become a major challenge to both the semiconductor and EDA industries, since a significantly increased mismatch is emerging between modeled and actual silicon behavior. Therefore, the addition of accurate and low-cost on-chip sensors is of great value to reduce the mismatch. This paper presents a standard-cell-based, novel, and accurate sensor for reliability analysis of digital ICs (Radic), in order to better understand the characteristics of gate/path aging and process variations' impact on timing performance. The Radic sensor performs aging, flip-flop (FF) metastability window and variation measurements on-chip. This sensor has been fabricated in a floating gate Freescale SOC in very advanced technology. The measurement results demonstrate that the resolution is better than 0.1ps, and the accuracy is kept throughout aging/process variation. Furthermore, reliability and FF metastability measurements are performed using the proposed sensor. The measurement results agree with the existing models.

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Bias temperature reliability of n/sup +/ and p/sup +/ polysilicon gated NMOSFETs and PMOSFETs

Cited by 10 publications

References 4 publications

Interface Trap Generation and Hole Trapping Under NBTI and PBTI in Advanced CMOS Technology With a 2-nm Gate Oxide

Interface Trap Generation and Hole Trapping Under NBTI and PBTI in Advanced CMOS Technology With a 2-nm Gate Oxide

A Novel Authentication Methodology to Detect Counterfeit PCB Using PCB Trace-Based Ring Oscillator

Radic: A standard-cell-based sensor for on-chip aging and flip-flop metastability measurements

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